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airliedairlied
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Merge tag 'drm-msm-fixes-2021-11-28' of https://gitlab.freedesktop.org/drm/msm into drm-fixes
msm misc fixes, build, display Signed-off-by: Dave Airlie <[email protected]> From: Rob Clark <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsV-ntO_u323XMKuD6bgbgvXporwi1sbyXwNDAuA52Afw@mail.gmail.com
2 parents d58071a + afece15 commit 8b233a8

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12 files changed

+84
-40
lines changed

12 files changed

+84
-40
lines changed

‎drivers/gpu/drm/msm/Kconfig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,8 +4,8 @@ config DRM_MSM
44
tristate "MSM DRM"
55
depends on DRM
66
depends on ARCH_QCOM || SOC_IMX5 || COMPILE_TEST
7+
depends on COMMON_CLK
78
depends on IOMMU_SUPPORT
8-
depends on (OF && COMMON_CLK) || COMPILE_TEST
99
depends on QCOM_OCMEM || QCOM_OCMEM=n
1010
depends on QCOM_LLCC || QCOM_LLCC=n
1111
depends on QCOM_COMMAND_DB || QCOM_COMMAND_DB=n

‎drivers/gpu/drm/msm/Makefile

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -23,8 +23,10 @@ msm-y := \
2323
hdmi/hdmi_i2c.o \
2424
hdmi/hdmi_phy.o \
2525
hdmi/hdmi_phy_8960.o \
26+
hdmi/hdmi_phy_8996.o \
2627
hdmi/hdmi_phy_8x60.o \
2728
hdmi/hdmi_phy_8x74.o \
29+
hdmi/hdmi_pll_8960.o \
2830
edp/edp.o \
2931
edp/edp_aux.o \
3032
edp/edp_bridge.o \
@@ -37,6 +39,7 @@ msm-y := \
3739
disp/mdp4/mdp4_dtv_encoder.o \
3840
disp/mdp4/mdp4_lcdc_encoder.o \
3941
disp/mdp4/mdp4_lvds_connector.o \
42+
disp/mdp4/mdp4_lvds_pll.o \
4043
disp/mdp4/mdp4_irq.o \
4144
disp/mdp4/mdp4_kms.o \
4245
disp/mdp4/mdp4_plane.o \
@@ -116,9 +119,6 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \
116119
dp/dp_audio.o
117120

118121
msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
119-
msm-$(CONFIG_COMMON_CLK) += disp/mdp4/mdp4_lvds_pll.o
120-
msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_pll_8960.o
121-
msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_phy_8996.o
122122

123123
msm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o
124124

‎drivers/gpu/drm/msm/adreno/a6xx_gpu.c

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1424,17 +1424,24 @@ static void a6xx_llc_activate(struct a6xx_gpu *a6xx_gpu)
14241424
{
14251425
struct adreno_gpu *adreno_gpu = &a6xx_gpu->base;
14261426
struct msm_gpu *gpu = &adreno_gpu->base;
1427-
u32 gpu_scid, cntl1_regval = 0;
1427+
u32 cntl1_regval = 0;
14281428

14291429
if (IS_ERR(a6xx_gpu->llc_mmio))
14301430
return;
14311431

14321432
if (!llcc_slice_activate(a6xx_gpu->llc_slice)) {
1433-
gpu_scid = llcc_get_slice_id(a6xx_gpu->llc_slice);
1433+
u32 gpu_scid = llcc_get_slice_id(a6xx_gpu->llc_slice);
14341434

14351435
gpu_scid &= 0x1f;
14361436
cntl1_regval = (gpu_scid << 0) | (gpu_scid << 5) | (gpu_scid << 10) |
14371437
(gpu_scid << 15) | (gpu_scid << 20);
1438+
1439+
/* On A660, the SCID programming for UCHE traffic is done in
1440+
* A6XX_GBIF_SCACHE_CNTL0[14:10]
1441+
*/
1442+
if (adreno_is_a660_family(adreno_gpu))
1443+
gpu_rmw(gpu, REG_A6XX_GBIF_SCACHE_CNTL0, (0x1f << 10) |
1444+
(1 << 8), (gpu_scid << 10) | (1 << 8));
14381445
}
14391446

14401447
/*
@@ -1471,13 +1478,6 @@ static void a6xx_llc_activate(struct a6xx_gpu *a6xx_gpu)
14711478
}
14721479

14731480
gpu_rmw(gpu, REG_A6XX_GBIF_SCACHE_CNTL1, GENMASK(24, 0), cntl1_regval);
1474-
1475-
/* On A660, the SCID programming for UCHE traffic is done in
1476-
* A6XX_GBIF_SCACHE_CNTL0[14:10]
1477-
*/
1478-
if (adreno_is_a660_family(adreno_gpu))
1479-
gpu_rmw(gpu, REG_A6XX_GBIF_SCACHE_CNTL0, (0x1f << 10) |
1480-
(1 << 8), (gpu_scid << 10) | (1 << 8));
14811481
}
14821482

14831483
static void a6xx_llc_slices_destroy(struct a6xx_gpu *a6xx_gpu)
@@ -1640,7 +1640,7 @@ static unsigned long a6xx_gpu_busy(struct msm_gpu *gpu)
16401640
return (unsigned long)busy_time;
16411641
}
16421642

1643-
void a6xx_gpu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp)
1643+
static void a6xx_gpu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp)
16441644
{
16451645
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
16461646
struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);

‎drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -777,12 +777,12 @@ static void a6xx_get_gmu_registers(struct msm_gpu *gpu,
777777
struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);
778778

779779
a6xx_state->gmu_registers = state_kcalloc(a6xx_state,
780-
2, sizeof(*a6xx_state->gmu_registers));
780+
3, sizeof(*a6xx_state->gmu_registers));
781781

782782
if (!a6xx_state->gmu_registers)
783783
return;
784784

785-
a6xx_state->nr_gmu_registers = 2;
785+
a6xx_state->nr_gmu_registers = 3;
786786

787787
/* Get the CX GMU registers from AHB */
788788
_a6xx_get_gmu_registers(gpu, a6xx_state, &a6xx_gmu_reglist[0],

‎drivers/gpu/drm/msm/dp/dp_aux.c

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@ struct dp_aux_private {
3333
bool read;
3434
bool no_send_addr;
3535
bool no_send_stop;
36+
bool initted;
3637
u32 offset;
3738
u32 segment;
3839

@@ -331,6 +332,10 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
331332
}
332333

333334
mutex_lock(&aux->mutex);
335+
if (!aux->initted) {
336+
ret = -EIO;
337+
goto exit;
338+
}
334339

335340
dp_aux_update_offset_and_segment(aux, msg);
336341
dp_aux_transfer_helper(aux, msg, true);
@@ -380,6 +385,8 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
380385
}
381386

382387
aux->cmd_busy = false;
388+
389+
exit:
383390
mutex_unlock(&aux->mutex);
384391

385392
return ret;
@@ -431,8 +438,13 @@ void dp_aux_init(struct drm_dp_aux *dp_aux)
431438

432439
aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
433440

441+
mutex_lock(&aux->mutex);
442+
434443
dp_catalog_aux_enable(aux->catalog, true);
435444
aux->retry_cnt = 0;
445+
aux->initted = true;
446+
447+
mutex_unlock(&aux->mutex);
436448
}
437449

438450
void dp_aux_deinit(struct drm_dp_aux *dp_aux)
@@ -441,7 +453,12 @@ void dp_aux_deinit(struct drm_dp_aux *dp_aux)
441453

442454
aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
443455

456+
mutex_lock(&aux->mutex);
457+
458+
aux->initted = false;
444459
dp_catalog_aux_enable(aux->catalog, false);
460+
461+
mutex_unlock(&aux->mutex);
445462
}
446463

447464
int dp_aux_register(struct drm_dp_aux *dp_aux)

‎drivers/gpu/drm/msm/dsi/dsi_host.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1658,6 +1658,8 @@ static int dsi_host_parse_lane_data(struct msm_dsi_host *msm_host,
16581658
if (!prop) {
16591659
DRM_DEV_DEBUG(dev,
16601660
"failed to find data lane mapping, using default\n");
1661+
/* Set the number of date lanes to 4 by default. */
1662+
msm_host->num_data_lanes = 4;
16611663
return 0;
16621664
}
16631665

‎drivers/gpu/drm/msm/msm_debugfs.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -77,6 +77,7 @@ static int msm_gpu_open(struct inode *inode, struct file *file)
7777
goto free_priv;
7878

7979
pm_runtime_get_sync(&gpu->pdev->dev);
80+
msm_gpu_hw_init(gpu);
8081
show_priv->state = gpu->funcs->gpu_state_get(gpu);
8182
pm_runtime_put_sync(&gpu->pdev->dev);
8283

‎drivers/gpu/drm/msm/msm_drv.c

Lines changed: 32 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -967,29 +967,18 @@ static int msm_ioctl_gem_info(struct drm_device *dev, void *data,
967967
return ret;
968968
}
969969

970-
static int msm_ioctl_wait_fence(struct drm_device *dev, void *data,
971-
struct drm_file *file)
970+
static int wait_fence(struct msm_gpu_submitqueue *queue, uint32_t fence_id,
971+
ktime_t timeout)
972972
{
973-
struct msm_drm_private *priv = dev->dev_private;
974-
struct drm_msm_wait_fence *args = data;
975-
ktime_t timeout = to_ktime(args->timeout);
976-
struct msm_gpu_submitqueue *queue;
977-
struct msm_gpu *gpu = priv->gpu;
978973
struct dma_fence *fence;
979974
int ret;
980975

981-
if (args->pad) {
982-
DRM_ERROR("invalid pad: %08x\n", args->pad);
976+
if (fence_id > queue->last_fence) {
977+
DRM_ERROR_RATELIMITED("waiting on invalid fence: %u (of %u)\n",
978+
fence_id, queue->last_fence);
983979
return -EINVAL;
984980
}
985981

986-
if (!gpu)
987-
return 0;
988-
989-
queue = msm_submitqueue_get(file->driver_priv, args->queueid);
990-
if (!queue)
991-
return -ENOENT;
992-
993982
/*
994983
* Map submitqueue scoped "seqno" (which is actually an idr key)
995984
* back to underlying dma-fence
@@ -1001,7 +990,7 @@ static int msm_ioctl_wait_fence(struct drm_device *dev, void *data,
1001990
ret = mutex_lock_interruptible(&queue->lock);
1002991
if (ret)
1003992
return ret;
1004-
fence = idr_find(&queue->fence_idr, args->fence);
993+
fence = idr_find(&queue->fence_idr, fence_id);
1005994
if (fence)
1006995
fence = dma_fence_get_rcu(fence);
1007996
mutex_unlock(&queue->lock);
@@ -1017,6 +1006,32 @@ static int msm_ioctl_wait_fence(struct drm_device *dev, void *data,
10171006
}
10181007

10191008
dma_fence_put(fence);
1009+
1010+
return ret;
1011+
}
1012+
1013+
static int msm_ioctl_wait_fence(struct drm_device *dev, void *data,
1014+
struct drm_file *file)
1015+
{
1016+
struct msm_drm_private *priv = dev->dev_private;
1017+
struct drm_msm_wait_fence *args = data;
1018+
struct msm_gpu_submitqueue *queue;
1019+
int ret;
1020+
1021+
if (args->pad) {
1022+
DRM_ERROR("invalid pad: %08x\n", args->pad);
1023+
return -EINVAL;
1024+
}
1025+
1026+
if (!priv->gpu)
1027+
return 0;
1028+
1029+
queue = msm_submitqueue_get(file->driver_priv, args->queueid);
1030+
if (!queue)
1031+
return -ENOENT;
1032+
1033+
ret = wait_fence(queue, args->fence, to_ktime(args->timeout));
1034+
10201035
msm_submitqueue_put(queue);
10211036

10221037
return ret;

‎drivers/gpu/drm/msm/msm_gem.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1056,8 +1056,7 @@ static int msm_gem_object_mmap(struct drm_gem_object *obj, struct vm_area_struct
10561056
{
10571057
struct msm_gem_object *msm_obj = to_msm_bo(obj);
10581058

1059-
vma->vm_flags &= ~VM_PFNMAP;
1060-
vma->vm_flags |= VM_MIXEDMAP | VM_DONTEXPAND;
1059+
vma->vm_flags |= VM_IO | VM_MIXEDMAP | VM_DONTEXPAND | VM_DONTDUMP;
10611060
vma->vm_page_prot = msm_gem_pgprot(msm_obj, vm_get_page_prot(vma->vm_flags));
10621061

10631062
return 0;
@@ -1121,7 +1120,7 @@ static int msm_gem_new_impl(struct drm_device *dev,
11211120
break;
11221121
fallthrough;
11231122
default:
1124-
DRM_DEV_ERROR(dev->dev, "invalid cache flag: %x\n",
1123+
DRM_DEV_DEBUG(dev->dev, "invalid cache flag: %x\n",
11251124
(flags & MSM_BO_CACHE_MASK));
11261125
return -EINVAL;
11271126
}

‎drivers/gpu/drm/msm/msm_gem_submit.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -772,6 +772,7 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
772772
args->nr_cmds);
773773
if (IS_ERR(submit)) {
774774
ret = PTR_ERR(submit);
775+
submit = NULL;
775776
goto out_unlock;
776777
}
777778

@@ -904,6 +905,7 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
904905
drm_sched_entity_push_job(&submit->base);
905906

906907
args->fence = submit->fence_id;
908+
queue->last_fence = submit->fence_id;
907909

908910
msm_reset_syncobjs(syncobjs_to_reset, args->nr_in_syncobjs);
909911
msm_process_post_deps(post_deps, args->nr_out_syncobjs,

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