@@ -182,133 +182,35 @@ static const struct flash_info micron_nor_parts[] = {
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static const struct flash_info st_nor_parts [] = {
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{
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- .id = SNOR_ID (0x20 , 0xbb , 0x15 ),
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- .name = "n25q016a" ,
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- .size = SZ_2M ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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- }, {
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- .id = SNOR_ID (0x20 , 0xba , 0x16 ),
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- .name = "n25q032" ,
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- .size = SZ_4M ,
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- .no_sfdp_flags = SPI_NOR_QUAD_READ ,
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- }, {
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- .id = SNOR_ID (0x20 , 0xbb , 0x16 ),
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- .name = "n25q032a" ,
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- .size = SZ_4M ,
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- .no_sfdp_flags = SPI_NOR_QUAD_READ ,
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- }, {
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- .id = SNOR_ID (0x20 , 0xba , 0x17 ),
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- .name = "n25q064" ,
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- .size = SZ_8M ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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- }, {
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- .id = SNOR_ID (0x20 , 0xbb , 0x17 ),
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- .name = "n25q064a" ,
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- .size = SZ_8M ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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- }, {
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- .id = SNOR_ID (0x20 , 0xbb , 0x18 ),
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- .name = "n25q128a11" ,
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- .size = SZ_16M ,
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- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
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- SPI_NOR_BP3_SR_BIT6 ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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- .mfr_flags = USE_FSR ,
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- }, {
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- .id = SNOR_ID (0x20 , 0xba , 0x18 ),
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- .name = "n25q128a13" ,
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- .size = SZ_16M ,
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- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
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- SPI_NOR_BP3_SR_BIT6 ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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- .mfr_flags = USE_FSR ,
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- }, {
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- .id = SNOR_ID (0x20 , 0xba , 0x19 , 0x10 , 0x44 , 0x00 ),
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- .name = "mt25ql256a" ,
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- .size = SZ_32M ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ ,
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- .fixup_flags = SPI_NOR_4B_OPCODES ,
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- .mfr_flags = USE_FSR ,
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- }, {
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- .id = SNOR_ID (0x20 , 0xba , 0x19 ),
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- .name = "n25q256a" ,
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- .size = SZ_32M ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ ,
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- .mfr_flags = USE_FSR ,
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- }, {
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- .id = SNOR_ID (0x20 , 0xbb , 0x19 , 0x10 , 0x44 , 0x00 ),
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- .name = "mt25qu256a" ,
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- .size = SZ_32M ,
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- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
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- SPI_NOR_BP3_SR_BIT6 ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ ,
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- .fixup_flags = SPI_NOR_4B_OPCODES ,
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- .mfr_flags = USE_FSR ,
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- }, {
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- .id = SNOR_ID (0x20 , 0xbb , 0x19 ),
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- .name = "n25q256ax1" ,
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- .size = SZ_32M ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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- .mfr_flags = USE_FSR ,
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+ .name = "m25p05-nonjedec" ,
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+ .sector_size = SZ_32K ,
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+ .size = SZ_64K ,
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}, {
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- .id = SNOR_ID (0x20 , 0xba , 0x20 , 0x10 , 0x44 , 0x00 ),
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- .name = "mt25ql512a" ,
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- .size = SZ_64M ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ ,
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- .fixup_flags = SPI_NOR_4B_OPCODES ,
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- .mfr_flags = USE_FSR ,
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+ .name = "m25p10-nonjedec" ,
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+ .sector_size = SZ_32K ,
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+ .size = SZ_128K ,
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}, {
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- .id = SNOR_ID (0x20 , 0xba , 0x20 ),
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- .name = "n25q512ax3" ,
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- .size = SZ_64M ,
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- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
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- SPI_NOR_BP3_SR_BIT6 ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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- .mfr_flags = USE_FSR ,
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+ .name = "m25p20-nonjedec" ,
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+ .size = SZ_256K ,
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}, {
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- .id = SNOR_ID (0x20 , 0xbb , 0x20 , 0x10 , 0x44 , 0x00 ),
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- .name = "mt25qu512a" ,
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- .size = SZ_64M ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ ,
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- .fixup_flags = SPI_NOR_4B_OPCODES ,
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- .mfr_flags = USE_FSR ,
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+ .name = "m25p40-nonjedec" ,
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+ .size = SZ_512K ,
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}, {
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- .id = SNOR_ID (0x20 , 0xbb , 0x20 ),
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- .name = "n25q512a" ,
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- .size = SZ_64M ,
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- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
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- SPI_NOR_BP3_SR_BIT6 ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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- .mfr_flags = USE_FSR ,
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+ .name = "m25p80-nonjedec" ,
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+ .size = SZ_1M ,
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}, {
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- .id = SNOR_ID (0x20 , 0xba , 0x21 ),
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- .name = "n25q00" ,
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- .size = SZ_128M ,
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- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
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- SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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- .mfr_flags = USE_FSR ,
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+ .name = "m25p16-nonjedec" ,
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+ .size = SZ_2M ,
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}, {
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- .id = SNOR_ID (0x20 , 0xbb , 0x21 ),
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- .name = "n25q00a" ,
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- .size = SZ_128M ,
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- .flags = NO_CHIP_ERASE ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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- .mfr_flags = USE_FSR ,
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+ .name = "m25p32-nonjedec" ,
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+ .size = SZ_4M ,
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}, {
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- .id = SNOR_ID (0x20 , 0xba , 0x22 ),
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- .name = "mt25ql02g" ,
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- .size = SZ_256M ,
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- .flags = NO_CHIP_ERASE ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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- .mfr_flags = USE_FSR ,
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+ .name = "m25p64-nonjedec" ,
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+ .size = SZ_8M ,
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}, {
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- .id = SNOR_ID (0x20 , 0xbb , 0x22 ),
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- .name = "mt25qu02g" ,
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- .size = SZ_256M ,
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- .flags = NO_CHIP_ERASE ,
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- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ ,
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- .mfr_flags = USE_FSR ,
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+ .name = "m25p128-nonjedec" ,
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+ .sector_size = SZ_256K ,
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+ .size = SZ_16M ,
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}, {
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.id = SNOR_ID (0x20 , 0x20 , 0x10 ),
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.name = "m25p05" ,
@@ -348,36 +250,6 @@ static const struct flash_info st_nor_parts[] = {
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.name = "m25p128" ,
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.sector_size = SZ_256K ,
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.size = SZ_16M ,
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- }, {
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- .name = "m25p05-nonjedec" ,
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- .sector_size = SZ_32K ,
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- .size = SZ_64K ,
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- }, {
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- .name = "m25p10-nonjedec" ,
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- .sector_size = SZ_32K ,
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- .size = SZ_128K ,
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- }, {
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- .name = "m25p20-nonjedec" ,
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- .size = SZ_256K ,
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- }, {
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- .name = "m25p40-nonjedec" ,
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- .size = SZ_512K ,
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- }, {
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- .name = "m25p80-nonjedec" ,
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- .size = SZ_1M ,
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- }, {
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- .name = "m25p16-nonjedec" ,
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- .size = SZ_2M ,
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- }, {
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- .name = "m25p32-nonjedec" ,
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- .size = SZ_4M ,
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- }, {
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- .name = "m25p64-nonjedec" ,
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- .size = SZ_8M ,
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- }, {
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- .name = "m25p128-nonjedec" ,
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- .sector_size = SZ_256K ,
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- .size = SZ_16M ,
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}, {
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.id = SNOR_ID (0x20 , 0x40 , 0x11 ),
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.name = "m45pe10" ,
@@ -391,18 +263,14 @@ static const struct flash_info st_nor_parts[] = {
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.name = "m45pe16" ,
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.size = SZ_2M ,
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}, {
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- .id = SNOR_ID (0x20 , 0x80 , 0x12 ),
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- .name = "m25pe20" ,
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- .size = SZ_256K ,
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+ .id = SNOR_ID (0x20 , 0x63 , 0x16 ),
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+ .name = "m25px32-s1" ,
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+ .size = SZ_4M ,
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+ .no_sfdp_flags = SECT_4K ,
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}, {
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- .id = SNOR_ID (0x20 , 0x80 , 0x14 ),
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- .name = "m25pe80 " ,
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+ .id = SNOR_ID (0x20 , 0x71 , 0x14 ),
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+ .name = "m25px80 " ,
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.size = SZ_1M ,
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- }, {
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- .id = SNOR_ID (0x20 , 0x80 , 0x15 ),
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- .name = "m25pe16" ,
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- .size = SZ_2M ,
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- .no_sfdp_flags = SECT_4K ,
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}, {
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.id = SNOR_ID (0x20 , 0x71 , 0x15 ),
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.name = "m25px16" ,
@@ -413,25 +281,157 @@ static const struct flash_info st_nor_parts[] = {
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.name = "m25px32" ,
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.size = SZ_4M ,
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.no_sfdp_flags = SECT_4K ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0x71 , 0x17 ),
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+ .name = "m25px64" ,
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+ .size = SZ_8M ,
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}, {
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.id = SNOR_ID (0x20 , 0x73 , 0x16 ),
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.name = "m25px32-s0" ,
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.size = SZ_4M ,
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.no_sfdp_flags = SECT_4K ,
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}, {
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- .id = SNOR_ID (0x20 , 0x63 , 0x16 ),
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- .name = "m25px32-s1" ,
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- .size = SZ_4M ,
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+ .id = SNOR_ID (0x20 , 0x80 , 0x12 ),
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+ .name = "m25pe20" ,
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+ .size = SZ_256K ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0x80 , 0x14 ),
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+ .name = "m25pe80" ,
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+ .size = SZ_1M ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0x80 , 0x15 ),
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+ .name = "m25pe16" ,
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+ .size = SZ_2M ,
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.no_sfdp_flags = SECT_4K ,
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}, {
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- .id = SNOR_ID (0x20 , 0x71 , 0x17 ),
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- .name = "m25px64" ,
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+ .id = SNOR_ID (0x20 , 0xba , 0x16 ),
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+ .name = "n25q032" ,
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+ .size = SZ_4M ,
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+ .no_sfdp_flags = SPI_NOR_QUAD_READ ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xba , 0x17 ),
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+ .name = "n25q064" ,
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.size = SZ_8M ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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}, {
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- .id = SNOR_ID (0x20 , 0x71 , 0x14 ),
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- .name = "m25px80" ,
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- .size = SZ_1M ,
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- },
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+ .id = SNOR_ID (0x20 , 0xba , 0x18 ),
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+ .name = "n25q128a13" ,
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+ .size = SZ_16M ,
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+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
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+ SPI_NOR_BP3_SR_BIT6 ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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+ .mfr_flags = USE_FSR ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xba , 0x19 , 0x10 , 0x44 , 0x00 ),
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+ .name = "mt25ql256a" ,
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+ .size = SZ_32M ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ ,
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+ .fixup_flags = SPI_NOR_4B_OPCODES ,
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+ .mfr_flags = USE_FSR ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xba , 0x19 ),
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+ .name = "n25q256a" ,
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+ .size = SZ_32M ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ ,
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+ .mfr_flags = USE_FSR ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xba , 0x20 , 0x10 , 0x44 , 0x00 ),
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+ .name = "mt25ql512a" ,
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+ .size = SZ_64M ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ ,
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+ .fixup_flags = SPI_NOR_4B_OPCODES ,
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+ .mfr_flags = USE_FSR ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xba , 0x20 ),
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+ .name = "n25q512ax3" ,
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+ .size = SZ_64M ,
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+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
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+ SPI_NOR_BP3_SR_BIT6 ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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+ .mfr_flags = USE_FSR ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xba , 0x21 ),
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+ .name = "n25q00" ,
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+ .size = SZ_128M ,
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+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
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+ SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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+ .mfr_flags = USE_FSR ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xba , 0x22 ),
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+ .name = "mt25ql02g" ,
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+ .size = SZ_256M ,
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+ .flags = NO_CHIP_ERASE ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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+ .mfr_flags = USE_FSR ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xbb , 0x15 ),
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+ .name = "n25q016a" ,
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+ .size = SZ_2M ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xbb , 0x16 ),
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+ .name = "n25q032a" ,
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+ .size = SZ_4M ,
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+ .no_sfdp_flags = SPI_NOR_QUAD_READ ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xbb , 0x17 ),
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+ .name = "n25q064a" ,
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+ .size = SZ_8M ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xbb , 0x18 ),
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+ .name = "n25q128a11" ,
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+ .size = SZ_16M ,
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+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
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+ SPI_NOR_BP3_SR_BIT6 ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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+ .mfr_flags = USE_FSR ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xbb , 0x19 , 0x10 , 0x44 , 0x00 ),
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+ .name = "mt25qu256a" ,
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+ .size = SZ_32M ,
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+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
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+ SPI_NOR_BP3_SR_BIT6 ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ ,
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+ .fixup_flags = SPI_NOR_4B_OPCODES ,
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+ .mfr_flags = USE_FSR ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xbb , 0x19 ),
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+ .name = "n25q256ax1" ,
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+ .size = SZ_32M ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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+ .mfr_flags = USE_FSR ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xbb , 0x20 , 0x10 , 0x44 , 0x00 ),
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+ .name = "mt25qu512a" ,
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+ .size = SZ_64M ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ ,
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+ .fixup_flags = SPI_NOR_4B_OPCODES ,
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+ .mfr_flags = USE_FSR ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xbb , 0x20 ),
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+ .name = "n25q512a" ,
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+ .size = SZ_64M ,
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+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
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+ SPI_NOR_BP3_SR_BIT6 ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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+ .mfr_flags = USE_FSR ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xbb , 0x21 ),
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+ .name = "n25q00a" ,
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+ .size = SZ_128M ,
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+ .flags = NO_CHIP_ERASE ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ ,
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+ .mfr_flags = USE_FSR ,
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+ }, {
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+ .id = SNOR_ID (0x20 , 0xbb , 0x22 ),
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+ .name = "mt25qu02g" ,
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+ .size = SZ_256M ,
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+ .flags = NO_CHIP_ERASE ,
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+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ ,
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+ .mfr_flags = USE_FSR ,
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+ }
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};
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/**
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