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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas: "A couple of build/config issues and expanding the speculative SSBS workaround to more CPUs: - Expand the speculative SSBS workaround to cover Cortex-A715, Neoverse-N3 and Microsoft Azure Cobalt 100 - Force position-independent veneers - in some kernel configurations, the LLD linker generates position-dependent veneers for otherwise position-independent code, resulting in early boot-time failures - Fix Kconfig selection of HAVE_DYNAMIC_FTRACE_WITH_ARGS so that it is not enabled when not supported by the combination of clang and GNU ld" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: Subscribe Microsoft Azure Cobalt 100 to erratum 3194386 arm64: fix selection of HAVE_DYNAMIC_FTRACE_WITH_ARGS arm64: errata: Expand speculative SSBS workaround once more arm64: cputype: Add Neoverse-N3 definitions arm64: Force position-independent veneers
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‎Documentation/arch/arm64/silicon-errata.rst

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@@ -146,6 +146,8 @@ stable kernels.
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A715 | #2645198 | ARM64_ERRATUM_2645198 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A715 | #3456084 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A720 | #3456091 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A725 | #3456106 | ARM64_ERRATUM_3194386 |
@@ -186,6 +188,8 @@ stable kernels.
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-N2 | #3324339 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-N3 | #3456111 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-V1 | #1619801 | N/A |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-V1 | #3324341 | ARM64_ERRATUM_3194386 |
@@ -289,3 +293,5 @@ stable kernels.
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+----------------+-----------------+-----------------+-----------------------------+
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| Microsoft | Azure Cobalt 100| #2253138 | ARM64_ERRATUM_2253138 |
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+----------------+-----------------+-----------------+-----------------------------+
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| Microsoft | Azure Cobalt 100| #3324339 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+

‎arch/arm64/Kconfig

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@@ -200,7 +200,8 @@ config ARM64
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select HAVE_DMA_CONTIGUOUS
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select HAVE_DYNAMIC_FTRACE
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select HAVE_DYNAMIC_FTRACE_WITH_ARGS \
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if $(cc-option,-fpatchable-function-entry=2)
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if (GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS || \
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CLANG_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS)
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select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS \
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if DYNAMIC_FTRACE_WITH_ARGS && DYNAMIC_FTRACE_WITH_CALL_OPS
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select HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS \
@@ -286,12 +287,10 @@ config CLANG_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS
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def_bool CC_IS_CLANG
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# https://github.com/ClangBuiltLinux/linux/issues/1507
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depends on AS_IS_GNU || (AS_IS_LLVM && (LD_IS_LLD || LD_VERSION >= 23600))
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select HAVE_DYNAMIC_FTRACE_WITH_ARGS
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config GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS
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def_bool CC_IS_GCC
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depends on $(cc-option,-fpatchable-function-entry=2)
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select HAVE_DYNAMIC_FTRACE_WITH_ARGS
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config 64BIT
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def_bool y
@@ -1097,6 +1096,7 @@ config ARM64_ERRATUM_3194386
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* ARM Cortex-A78C erratum 3324346
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* ARM Cortex-A78C erratum 3324347
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* ARM Cortex-A710 erratam 3324338
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* ARM Cortex-A715 errartum 3456084
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* ARM Cortex-A720 erratum 3456091
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* ARM Cortex-A725 erratum 3456106
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* ARM Cortex-X1 erratum 3324344
@@ -1107,6 +1107,7 @@ config ARM64_ERRATUM_3194386
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* ARM Cortex-X925 erratum 3324334
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* ARM Neoverse-N1 erratum 3324349
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* ARM Neoverse N2 erratum 3324339
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* ARM Neoverse-N3 erratum 3456111
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* ARM Neoverse-V1 erratum 3324341
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* ARM Neoverse V2 erratum 3324336
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* ARM Neoverse-V3 erratum 3312417

‎arch/arm64/Makefile

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@@ -10,7 +10,7 @@
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#
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# Copyright (C) 1995-2001 by Russell King
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LDFLAGS_vmlinux :=--no-undefined -X
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LDFLAGS_vmlinux :=--no-undefined -X --pic-veneer
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ifeq ($(CONFIG_RELOCATABLE), y)
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# Pass --no-apply-dynamic-relocs to restore pre-binutils-2.27 behaviour

‎arch/arm64/include/asm/cputype.h

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@@ -94,6 +94,7 @@
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#define ARM_CPU_PART_NEOVERSE_V3 0xD84
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#define ARM_CPU_PART_CORTEX_X925 0xD85
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#define ARM_CPU_PART_CORTEX_A725 0xD87
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#define ARM_CPU_PART_NEOVERSE_N3 0xD8E
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#define APM_CPU_PART_XGENE 0x000
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#define APM_CPU_VAR_POTENZA 0x00
@@ -176,6 +177,7 @@
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#define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3)
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#define MIDR_CORTEX_X925 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X925)
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#define MIDR_CORTEX_A725 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A725)
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#define MIDR_NEOVERSE_N3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N3)
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#define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
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#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
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#define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)

‎arch/arm64/kernel/cpu_errata.c

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@@ -439,6 +439,7 @@ static const struct midr_range erratum_spec_ssbs_list[] = {
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MIDR_ALL_VERSIONS(MIDR_CORTEX_A78),
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MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C),
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MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),
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MIDR_ALL_VERSIONS(MIDR_CORTEX_A715),
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MIDR_ALL_VERSIONS(MIDR_CORTEX_A720),
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MIDR_ALL_VERSIONS(MIDR_CORTEX_A725),
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MIDR_ALL_VERSIONS(MIDR_CORTEX_X1),
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MIDR_ALL_VERSIONS(MIDR_CORTEX_X3),
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MIDR_ALL_VERSIONS(MIDR_CORTEX_X4),
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MIDR_ALL_VERSIONS(MIDR_CORTEX_X925),
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MIDR_ALL_VERSIONS(MIDR_MICROSOFT_AZURE_COBALT_100),
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MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),
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MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),
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MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N3),
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MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),
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MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),
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MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),

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