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Merge tag 'spacemit-dt-for-6.16-1' of https://github.com/spacemit-com/linux into soc/dt
RISC-V SpacemiT DT changes for 6.16 - Add clock driver, fix for pinctrl/uart - Add gpio support, enable LED heartbeat * tag 'spacemit-dt-for-6.16-1' of https://github.com/spacemit-com/linux: riscv: dts: spacemit: add gpio LED for system heartbeat riscv: dts: spacemit: add gpio support for K1 SoC riscv: dts: spacemit: Acquire clocks for UART riscv: dts: spacemit: Acquire clocks for pinctrl riscv: dts: spacemit: Add clock tree for SpacemiT K1 dt-bindings: clock: spacemit: Add spacemit,k1-pll dt-bindings: soc: spacemit: Add spacemit,k1-syscon Link: https://lore.kernel.org/r/20250514044841-GYA524674@gentoo Signed-off-by: Arnd Bergmann <[email protected]>
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‎Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
3+
---
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$id: http://devicetree.org/schemas/clock/spacemit,k1-pll.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
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title: SpacemiT K1 PLL
8+
9+
maintainers:
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- Haylen Chu <[email protected]>
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properties:
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compatible:
14+
const: spacemit,k1-pll
15+
16+
reg:
17+
maxItems: 1
18+
19+
clocks:
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description: External 24MHz oscillator
21+
22+
spacemit,mpmu:
23+
$ref: /schemas/types.yaml#/definitions/phandle
24+
description:
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Phandle to the "Main PMU (MPMU)" syscon. It is used to check PLL
26+
lock status.
27+
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"#clock-cells":
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const: 1
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description:
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See <dt-bindings/clock/spacemit,k1-syscon.h> for valid indices.
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required:
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- compatible
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- reg
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- clocks
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- spacemit,mpmu
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- "#clock-cells"
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additionalProperties: false
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examples:
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- |
44+
clock-controller@d4090000 {
45+
compatible = "spacemit,k1-pll";
46+
reg = <0xd4090000 0x1000>;
47+
clocks = <&vctcxo_24m>;
48+
spacemit,mpmu = <&sysctl_mpmu>;
49+
#clock-cells = <1>;
50+
};

‎Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/spacemit/spacemit,k1-syscon.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: SpacemiT K1 SoC System Controller
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maintainers:
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- Haylen Chu <[email protected]>
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description:
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System controllers found on SpacemiT K1 SoC, which are capable of
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clock, reset and power-management functions.
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properties:
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compatible:
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enum:
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- spacemit,k1-syscon-apbc
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- spacemit,k1-syscon-apmu
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- spacemit,k1-syscon-mpmu
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reg:
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maxItems: 1
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clocks:
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maxItems: 4
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clock-names:
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items:
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- const: osc
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- const: vctcxo_1m
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- const: vctcxo_3m
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- const: vctcxo_24m
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"#clock-cells":
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const: 1
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description:
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See <dt-bindings/clock/spacemit,k1-syscon.h> for valid indices.
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"#power-domain-cells":
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const: 1
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"#reset-cells":
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const: 1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- "#clock-cells"
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- "#reset-cells"
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: spacemit,k1-syscon-apbc
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then:
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properties:
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"#power-domain-cells": false
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else:
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required:
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- "#power-domain-cells"
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additionalProperties: false
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examples:
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- |
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system-controller@d4050000 {
73+
compatible = "spacemit,k1-syscon-mpmu";
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reg = <0xd4050000 0x209c>;
75+
clocks = <&osc>, <&vctcxo_1m>, <&vctcxo_3m>, <&vctcxo_24m>;
76+
clock-names = "osc", "vctcxo_1m", "vctcxo_3m", "vctcxo_24m";
77+
#clock-cells = <1>;
78+
#power-domain-cells = <1>;
79+
#reset-cells = <1>;
80+
};

‎arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts

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@@ -17,6 +17,17 @@
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chosen {
1818
stdout-path = "serial0";
1919
};
20+
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leds {
22+
compatible = "gpio-leds";
23+
24+
led1 {
25+
label = "sys-led";
26+
gpios = <&gpio K1_GPIO(96) GPIO_ACTIVE_HIGH>;
27+
linux,default-trigger = "heartbeat";
28+
default-state = "on";
29+
};
30+
};
2031
};
2132

2233
&uart0 {

‎arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi

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88
#define K1_PADCONF(pin, func) (((pin) << 16) | (func))
99

10+
/* Map GPIO pin to each bank's <index, offset> */
11+
#define K1_GPIO(x) (x / 32) (x % 32)
12+
1013
&pinctrl {
1114
uart0_2_cfg: uart0-2-cfg {
1215
uart0-2-pins {

‎arch/riscv/boot/dts/spacemit/k1.dtsi

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Original file line numberDiff line numberDiff line change
@@ -3,6 +3,8 @@
33
* Copyright (C) 2024 Yangyu Chen <[email protected]>
44
*/
55

6+
#include <dt-bindings/clock/spacemit,k1-syscon.h>
7+
68
/dts-v1/;
79
/ {
810
#address-cells = <2>;
@@ -306,6 +308,36 @@
306308
};
307309
};
308310

311+
clocks {
312+
vctcxo_1m: clock-1m {
313+
compatible = "fixed-clock";
314+
clock-frequency = <1000000>;
315+
clock-output-names = "vctcxo_1m";
316+
#clock-cells = <0>;
317+
};
318+
319+
vctcxo_24m: clock-24m {
320+
compatible = "fixed-clock";
321+
clock-frequency = <24000000>;
322+
clock-output-names = "vctcxo_24m";
323+
#clock-cells = <0>;
324+
};
325+
326+
vctcxo_3m: clock-3m {
327+
compatible = "fixed-clock";
328+
clock-frequency = <3000000>;
329+
clock-output-names = "vctcxo_3m";
330+
#clock-cells = <0>;
331+
};
332+
333+
osc_32k: clock-32k {
334+
compatible = "fixed-clock";
335+
clock-frequency = <32000>;
336+
clock-output-names = "osc_32k";
337+
#clock-cells = <0>;
338+
};
339+
};
340+
309341
soc {
310342
compatible = "simple-bus";
311343
interrupt-parent = <&plic>;
@@ -314,11 +346,24 @@
314346
dma-noncoherent;
315347
ranges;
316348

349+
syscon_apbc: system-controller@d4015000 {
350+
compatible = "spacemit,k1-syscon-apbc";
351+
reg = <0x0 0xd4015000 0x0 0x1000>;
352+
clocks = <&osc_32k>, <&vctcxo_1m>, <&vctcxo_3m>,
353+
<&vctcxo_24m>;
354+
clock-names = "osc", "vctcxo_1m", "vctcxo_3m",
355+
"vctcxo_24m";
356+
#clock-cells = <1>;
357+
#reset-cells = <1>;
358+
};
359+
317360
uart0: serial@d4017000 {
318361
compatible = "spacemit,k1-uart", "intel,xscale-uart";
319362
reg = <0x0 0xd4017000 0x0 0x100>;
363+
clocks = <&syscon_apbc CLK_UART0>,
364+
<&syscon_apbc CLK_UART0_BUS>;
365+
clock-names = "core", "bus";
320366
interrupts = <42>;
321-
clock-frequency = <14857000>;
322367
reg-shift = <2>;
323368
reg-io-width = <4>;
324369
status = "disabled";
@@ -327,8 +372,10 @@
327372
uart2: serial@d4017100 {
328373
compatible = "spacemit,k1-uart", "intel,xscale-uart";
329374
reg = <0x0 0xd4017100 0x0 0x100>;
375+
clocks = <&syscon_apbc CLK_UART2>,
376+
<&syscon_apbc CLK_UART2_BUS>;
377+
clock-names = "core", "bus";
330378
interrupts = <44>;
331-
clock-frequency = <14857000>;
332379
reg-shift = <2>;
333380
reg-io-width = <4>;
334381
status = "disabled";
@@ -337,8 +384,10 @@
337384
uart3: serial@d4017200 {
338385
compatible = "spacemit,k1-uart", "intel,xscale-uart";
339386
reg = <0x0 0xd4017200 0x0 0x100>;
387+
clocks = <&syscon_apbc CLK_UART3>,
388+
<&syscon_apbc CLK_UART3_BUS>;
389+
clock-names = "core", "bus";
340390
interrupts = <45>;
341-
clock-frequency = <14857000>;
342391
reg-shift = <2>;
343392
reg-io-width = <4>;
344393
status = "disabled";
@@ -347,8 +396,10 @@
347396
uart4: serial@d4017300 {
348397
compatible = "spacemit,k1-uart", "intel,xscale-uart";
349398
reg = <0x0 0xd4017300 0x0 0x100>;
399+
clocks = <&syscon_apbc CLK_UART4>,
400+
<&syscon_apbc CLK_UART4_BUS>;
401+
clock-names = "core", "bus";
350402
interrupts = <46>;
351-
clock-frequency = <14857000>;
352403
reg-shift = <2>;
353404
reg-io-width = <4>;
354405
status = "disabled";
@@ -357,8 +408,10 @@
357408
uart5: serial@d4017400 {
358409
compatible = "spacemit,k1-uart", "intel,xscale-uart";
359410
reg = <0x0 0xd4017400 0x0 0x100>;
411+
clocks = <&syscon_apbc CLK_UART5>,
412+
<&syscon_apbc CLK_UART5_BUS>;
413+
clock-names = "core", "bus";
360414
interrupts = <47>;
361-
clock-frequency = <14857000>;
362415
reg-shift = <2>;
363416
reg-io-width = <4>;
364417
status = "disabled";
@@ -367,8 +420,10 @@
367420
uart6: serial@d4017500 {
368421
compatible = "spacemit,k1-uart", "intel,xscale-uart";
369422
reg = <0x0 0xd4017500 0x0 0x100>;
423+
clocks = <&syscon_apbc CLK_UART6>,
424+
<&syscon_apbc CLK_UART6_BUS>;
425+
clock-names = "core", "bus";
370426
interrupts = <48>;
371-
clock-frequency = <14857000>;
372427
reg-shift = <2>;
373428
reg-io-width = <4>;
374429
status = "disabled";
@@ -377,8 +432,10 @@
377432
uart7: serial@d4017600 {
378433
compatible = "spacemit,k1-uart", "intel,xscale-uart";
379434
reg = <0x0 0xd4017600 0x0 0x100>;
435+
clocks = <&syscon_apbc CLK_UART7>,
436+
<&syscon_apbc CLK_UART7_BUS>;
437+
clock-names = "core", "bus";
380438
interrupts = <49>;
381-
clock-frequency = <14857000>;
382439
reg-shift = <2>;
383440
reg-io-width = <4>;
384441
status = "disabled";
@@ -387,8 +444,10 @@
387444
uart8: serial@d4017700 {
388445
compatible = "spacemit,k1-uart", "intel,xscale-uart";
389446
reg = <0x0 0xd4017700 0x0 0x100>;
447+
clocks = <&syscon_apbc CLK_UART8>,
448+
<&syscon_apbc CLK_UART8_BUS>;
449+
clock-names = "core", "bus";
390450
interrupts = <50>;
391-
clock-frequency = <14857000>;
392451
reg-shift = <2>;
393452
reg-io-width = <4>;
394453
status = "disabled";
@@ -397,16 +456,71 @@
397456
uart9: serial@d4017800 {
398457
compatible = "spacemit,k1-uart", "intel,xscale-uart";
399458
reg = <0x0 0xd4017800 0x0 0x100>;
459+
clocks = <&syscon_apbc CLK_UART9>,
460+
<&syscon_apbc CLK_UART9_BUS>;
461+
clock-names = "core", "bus";
400462
interrupts = <51>;
401-
clock-frequency = <14857000>;
402463
reg-shift = <2>;
403464
reg-io-width = <4>;
404465
status = "disabled";
405466
};
406467

468+
gpio: gpio@d4019000 {
469+
compatible = "spacemit,k1-gpio";
470+
reg = <0x0 0xd4019000 0x0 0x100>;
471+
clocks = <&syscon_apbc CLK_GPIO>,
472+
<&syscon_apbc CLK_GPIO_BUS>;
473+
clock-names = "core", "bus";
474+
gpio-controller;
475+
#gpio-cells = <3>;
476+
interrupts = <58>;
477+
interrupt-parent = <&plic>;
478+
interrupt-controller;
479+
#interrupt-cells = <3>;
480+
gpio-ranges = <&pinctrl 0 0 0 32>,
481+
<&pinctrl 1 0 32 32>,
482+
<&pinctrl 2 0 64 32>,
483+
<&pinctrl 3 0 96 32>;
484+
};
485+
407486
pinctrl: pinctrl@d401e000 {
408487
compatible = "spacemit,k1-pinctrl";
409488
reg = <0x0 0xd401e000 0x0 0x400>;
489+
clocks = <&syscon_apbc CLK_AIB>,
490+
<&syscon_apbc CLK_AIB_BUS>;
491+
clock-names = "func", "bus";
492+
};
493+
494+
syscon_mpmu: system-controller@d4050000 {
495+
compatible = "spacemit,k1-syscon-mpmu";
496+
reg = <0x0 0xd4050000 0x0 0x209c>;
497+
clocks = <&osc_32k>, <&vctcxo_1m>, <&vctcxo_3m>,
498+
<&vctcxo_24m>;
499+
clock-names = "osc", "vctcxo_1m", "vctcxo_3m",
500+
"vctcxo_24m";
501+
#clock-cells = <1>;
502+
#power-domain-cells = <1>;
503+
#reset-cells = <1>;
504+
};
505+
506+
pll: clock-controller@d4090000 {
507+
compatible = "spacemit,k1-pll";
508+
reg = <0x0 0xd4090000 0x0 0x1000>;
509+
clocks = <&vctcxo_24m>;
510+
spacemit,mpmu = <&syscon_mpmu>;
511+
#clock-cells = <1>;
512+
};
513+
514+
syscon_apmu: system-controller@d4282800 {
515+
compatible = "spacemit,k1-syscon-apmu";
516+
reg = <0x0 0xd4282800 0x0 0x400>;
517+
clocks = <&osc_32k>, <&vctcxo_1m>, <&vctcxo_3m>,
518+
<&vctcxo_24m>;
519+
clock-names = "osc", "vctcxo_1m", "vctcxo_3m",
520+
"vctcxo_24m";
521+
#clock-cells = <1>;
522+
#power-domain-cells = <1>;
523+
#reset-cells = <1>;
410524
};
411525

412526
plic: interrupt-controller@e0000000 {

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