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struct rz_mtu3_priv {
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void __iomem * mmio ;
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struct reset_control * rstc ;
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- raw_spinlock_t lock ;
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+ spinlock_t lock ;
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};
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/******* MTU3 registers (original offset is +0x1200) *******/
@@ -176,11 +176,11 @@ void rz_mtu3_shared_reg_update_bit(struct rz_mtu3_channel *ch, u16 offset,
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struct rz_mtu3_priv * priv = mtu -> priv_data ;
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unsigned long tmdr , flags ;
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- raw_spin_lock_irqsave (& priv -> lock , flags );
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+ spin_lock_irqsave (& priv -> lock , flags );
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tmdr = rz_mtu3_shared_reg_read (ch , offset );
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__assign_bit (pos , & tmdr , !!val );
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rz_mtu3_shared_reg_write (ch , offset , tmdr );
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- raw_spin_unlock_irqrestore (& priv -> lock , flags );
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+ spin_unlock_irqrestore (& priv -> lock , flags );
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}
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EXPORT_SYMBOL_GPL (rz_mtu3_shared_reg_update_bit );
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@@ -256,13 +256,13 @@ static void rz_mtu3_start_stop_ch(struct rz_mtu3_channel *ch, bool start)
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bitpos = rz_mtu3_get_tstr_bit_pos (ch );
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/* start stop register shared by multiple timer channels */
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- raw_spin_lock_irqsave (& priv -> lock , flags );
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+ spin_lock_irqsave (& priv -> lock , flags );
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tstr = rz_mtu3_shared_reg_read (ch , offset );
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__assign_bit (bitpos , & tstr , start );
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rz_mtu3_shared_reg_write (ch , offset , tstr );
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- raw_spin_unlock_irqrestore (& priv -> lock , flags );
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+ spin_unlock_irqrestore (& priv -> lock , flags );
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}
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bool rz_mtu3_is_enabled (struct rz_mtu3_channel * ch )
@@ -277,9 +277,9 @@ bool rz_mtu3_is_enabled(struct rz_mtu3_channel *ch)
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bitpos = rz_mtu3_get_tstr_bit_pos (ch );
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/* start stop register shared by multiple timer channels */
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- raw_spin_lock_irqsave (& priv -> lock , flags );
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+ spin_lock_irqsave (& priv -> lock , flags );
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tstr = rz_mtu3_shared_reg_read (ch , offset );
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- raw_spin_unlock_irqrestore (& priv -> lock , flags );
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+ spin_unlock_irqrestore (& priv -> lock , flags );
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return tstr & BIT (bitpos );
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}
@@ -349,7 +349,7 @@ static int rz_mtu3_probe(struct platform_device *pdev)
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return PTR_ERR (ddata -> clk );
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reset_control_deassert (priv -> rstc );
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- raw_spin_lock_init (& priv -> lock );
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+ spin_lock_init (& priv -> lock );
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platform_set_drvdata (pdev , ddata );
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for (i = 0 ; i < RZ_MTU_NUM_CHANNELS ; i ++ ) {
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