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ARM: exynos: MCPM: Restore big.LITTLE cpuidle support
Call exynos_cpu_power_up(cpunr) unconditionally. This is needed by the big.LITTLE cpuidle driver and has no side-effects on other code paths. The additional soft-reset call during little core power up has been added to properly boot all cores on the Exynos5422-based boards with secure firmware (like Odroid XU3/XU4 family). This however broke big.LITTLE CPUidle driver, which worked only on boards without secure firmware (like Peach-Pit/Pi Chromebooks). Apply the workaround only when board is running under secure firmware. Fixes: 833b579 ("ARM: EXYNOS: reset Little cores when cpu is up") Signed-off-by: Marek Szyprowski <[email protected]> Reviewed-by: Lukasz Luba <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]>
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arch/arm/mach-exynos/mcpm-exynos.c

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@
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#define EXYNOS5420_USE_L2_COMMON_UP_STATE BIT(30)
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static void __iomem *ns_sram_base_addr __ro_after_init;
29+
static bool secure_firmware __ro_after_init;
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/*
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* The common v7_exit_coherency_flush API could not be used because of the
@@ -58,15 +59,16 @@ static void __iomem *ns_sram_base_addr __ro_after_init;
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static int exynos_cpu_powerup(unsigned int cpu, unsigned int cluster)
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{
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unsigned int cpunr = cpu + (cluster * EXYNOS5420_CPUS_PER_CLUSTER);
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bool state;
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pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
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if (cpu >= EXYNOS5420_CPUS_PER_CLUSTER ||
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cluster >= EXYNOS5420_NR_CLUSTERS)
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return -EINVAL;
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67-
if (!exynos_cpu_power_state(cpunr)) {
68-
exynos_cpu_power_up(cpunr);
69-
69+
state = exynos_cpu_power_state(cpunr);
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exynos_cpu_power_up(cpunr);
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if (!state && secure_firmware) {
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/*
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* This assumes the cluster number of the big cores(Cortex A15)
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* is 0 and the Little cores(Cortex A7) is 1.
@@ -258,6 +260,8 @@ static int __init exynos_mcpm_init(void)
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return -ENOMEM;
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}
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263+
secure_firmware = exynos_secure_firmware_available();
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/*
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* To increase the stability of KFC reset we need to program
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* the PMU SPARE3 register

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