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33 changes: 18 additions & 15 deletions os/arch/arm/src/amebasmart/amebasmart_smp.c
Original file line number Diff line number Diff line change
Expand Up @@ -147,22 +147,25 @@ int vPortSecondaryBoot(int cpu)
int state;
int count = 10;

err = psci_cpu_on(cpu, (unsigned long)__cpu1_start);
DEBUGASSERT(err >= 0);

/* await for PSCI to report cpu state */
do {
state = psci_affinity_info(cpu, 0);
if (state == AFF_STATE_ON) {
break;
/* If psci_cpu_on is called more than once, the CPU may not function properly. */
if (psci_affinity_info(cpu, 0) == AFF_STATE_OFF) {
err = psci_cpu_on(cpu, (unsigned long)__cpu1_start);
DEBUGASSERT(err >= 0);

/* await for PSCI to report cpu state */
do {
state = psci_affinity_info(cpu, 0);
if (state == AFF_STATE_ON) {
break;
}

DelayUs(50);
} while (count--);

if (count <= 0) {
smplldbg("Secondary core boot timeout affinfo: %d\n", state);
return -ETIMEDOUT;
}

DelayUs(50);
} while (count--);

if (count <= 0) {
smplldbg("Secondary core boot timeout affinfo: %d\n", state);
return -ETIMEDOUT;
}

return OK;
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4 changes: 4 additions & 0 deletions os/arch/arm/src/armv7-a/arm_cpuoff.c
Original file line number Diff line number Diff line change
Expand Up @@ -292,6 +292,10 @@ int up_cpu_off(int cpu)
ret = up_cpu_down(cpu);
if (ret < 0) {
smplldbg("Failed to powerdown secondary core CPU%d\n", cpu);
/* The core has already been powered down. Returning an error here
* could cause a deadlock due to inconsistent CPU state.
* Therefore, turn the CPU back on. */
(void)up_cpu_on(cpu);
return ret;
}

Expand Down