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  1. 32-bit-RiscV-CPU 32-bit-RiscV-CPU Public

    A 32-bit RISC-V based CPU personal project. I am always making improvements as I grow and learn as an engineer.

    Verilog

  2. buffets buffets Public

    Forked from cwfletcher/buffets

    Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.

    Verilog