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Thank you for your pull request! 👋 |
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This is an experimental feature. The goal is to run a circuit simulation on the design, and return the results for human verification. stdout: To re-run this simulation, please make a change to the layout file (simply running V verification will change the date stamp in the layout), save it, and upload it to your GitHub fork. This will trigger this simulation to run again. _We have implemented automated computation of the ebeam-dc-halfring-straight s-parameters, for TE 1550. If the parameters chosen in the design were missing, a simulation job was submitted, and the CML on the server will be automatically updated, and available on for future circuit simulations. _
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