feat: add aarch64 user support #1

ZR233 · 2025-09-18T08:48:57Z

No description provided.

when lower exception come, UserContext.run can return a reason.

Azure-stars · 2025-09-18T09:47:22Z

src/trap.rs

+pub use page_table_entry::MappingFlags as PageFaultFlags;

 pub use crate::TrapFrame;
-pub use linkme::distributed_slice as def_trap_handler;


Don't need to change these imports

These are modified by rustfmt as well 🤣

Then maybe you can enable the CICD to check the fmt

https://github.com/Starry-OS/arceos also has this problem. Since we are working on a fork and the ultimate goal is to port it back upstream, if we make a coding style change here, the diff will be a disaster.

Can we keep the coding style consistent with the upstream by enabling the CI and use the same fmt confiig?

This will not work as expected. The upstream repository does not configure rustfmt, which results in a very relaxed configuration, meaning that code formatted with the strict configuration will definitely pass checks, as is the case in this PR.

src/aarch64/uspace.rs

Azure-stars · 2025-09-18T10:02:33Z

src/aarch64/uspace.rs

+use aarch64_cpu::registers::{FAR_EL1, Readable};
+use page_table_entry::MappingFlags;
+
+fn handle_instruction_abort_lower(tf: &TrapFrame, iss: u64, is_user: bool) -> ReturnReason {


This function only check whether it is a PageFault and return a ReturnReason. Maybe we can merge the check logic with

axcpu/src/aarch64/trap.rs

Lines 66 to 91 in f046e84

fn handle_data_abort(tf: &TrapFrame, iss: u64) {

let wnr = (iss & (1 << 6)) != 0; // WnR: Write not Read

let cm = (iss & (1 << 8)) != 0; // CM: Cache maintenance

let access_flags = if wnr & !cm {

PageFaultFlags::WRITE

} else {

PageFaultFlags::READ

};

let vaddr = va!(FAR_EL1.get() as usize);

// TODO: fixup_exception

// Only handle Translation fault and Permission fault

if !matches!(iss & 0b111100, 0b0100 | 0b1100) // IFSC or DFSC bits

|| !handle_trap!(PAGE_FAULT, vaddr, access_flags)

{

panic!(

"Unhandled EL1 Data Abort @ {:#x}, fault_vaddr={:#x}, ESR={:#x} ({:?}):\n{:#x?}\n{}",

tf.elr,

vaddr,

ESR_EL1.get(),

access_flags,

tf,

tf.backtrace()

);

}

}

For user mode, it returns a error reason.

For kernel mode, it call handle_trap directly to handle it.

Azure-stars · 2025-09-18T10:11:49Z

src/aarch64/trap.S

@@ -1,5 +1,4 @@
 .macro SAVE_REGS
-    sub     sp, sp, {trapframe_size}


Keep the sub code here because the RESTORE_REGS calls add code so you need to keep them consistent

Azure-stars · 2025-09-18T10:24:52Z

src/aarch64/uspace.rs

+        ldp     x6, x7,   [sp, 6 * 8]
+        ldp     x4, x5,   [sp, 4 * 8]
+        ldp     x2, x3,   [sp, 2 * 8]
+        ldp     x0, x1,   [sp]


Can we call RESTORE_REGS macro here to restore user context?

Then you can call SAVE_REGS in Task_EXIT macro.

I suggest moving _enter_user and _user_trap_entry into trap.S.

Azure-stars · 2025-09-18T10:25:51Z

src/aarch64/trap.rs

-    Irq = 1,
-    Fiq = 2,
-    SError = 3,
+    Irq         = 1,


Why add the padding here?

src/aarch64/uspace.rs

src/aarch64/context.rs

AsakuraMizu · 2025-09-18T18:21:35Z

src/aarch64/context.rs

+    pub const fn sysno(&self) -> usize {
+        self.r[8] as usize
+    }
+


And also add set_sysno

AsakuraMizu · 2025-09-18T18:23:08Z

src/aarch64/trap.S

+.Ldeadloop:
+    b .Ldeadloop 


Is this used at all? I suspect it's there for debugging...?

AsakuraMizu · 2025-09-18T18:26:56Z

src/aarch64/uspace.rs

+    pub esr: u64,
+    pub stval: usize,
+}

-    /// Creates a new context from the given [`TrapFrame`].
-    pub const fn from(trap_frame: &TrapFrame) -> Self {
-        Self(*trap_frame)
+impl ExceptionInfo {
+    pub fn kind(&self) -> ExceptionKind {
+        let esr: tock_registers::LocalRegisterCopy<u64, ESR_EL1::Register> =
+            tock_registers::LocalRegisterCopy::new(self.esr);


Maybe you can store a LocalRegisterCopy in ExceptionInfo directly. It's Debug + Clone + Copy.

AsakuraMizu · 2025-09-18T18:29:18Z

src/aarch64/uspace.rs

+        panic!(
+            "Unhandled {} Instruction Abort @ {:#x}, fault_vaddr={:#x}, ESR={:#x} \
+             ({:?}):\n{:#x?}\n{}",
+            if is_user { "EL0" } else { "EL1" },
+            tf.elr,
+            vaddr,
+            ESR_EL1.get(),
+            access_flags,
+            tf,
+            tf.backtrace()
+        );


Never panic for user mode exceptions. Instruct the caller that this kind of exception can not be handled.

AsakuraMizu · 2025-09-18T18:38:51Z

src/aarch64/uspace.rs

+        }
    }
+
+    pub fn new(entry: usize, ustack_top: VirtAddr, _arg0: usize) -> Self {


Correctly set arg0

AsakuraMizu · 2025-09-18T18:48:29Z

src/aarch64/uspace.rs

+impl UserContext {
+    pub fn run(&mut self) -> ReturnReason {
+        let tp_kind = unsafe { _enter_user(self) };
+        trace!("Returned from user space with TrapKind: {:?}", tp_kind);


AsakuraMizu · 2025-09-18T18:58:26Z

src/aarch64/uspace.rs

+#[derive(Debug, Clone)]
+pub struct UserContext {
+    tf: TrapFrame,
+    sp_el1: u64,


I'm not quite familiar with AArch64, but I believe that there is no need to save SP_EL1 since SP_EL0 should be used instead in user mode? Ignore this if I'm wrong.

AsakuraMizu · 2025-09-18T18:59:46Z

src/aarch64/uspace.rs

+        ldp     x6, x7,   [sp, 6 * 8]
+        ldp     x4, x5,   [sp, 4 * 8]
+        ldp     x2, x3,   [sp, 2 * 8]
+        ldp     x0, x1,   [sp]


I suggest moving _enter_user and _user_trap_entry into trap.S.

AsakuraMizu · 2025-09-18T19:04:48Z

src/aarch64/user_copy.S

+// AArch64 user space safe memory copy
+// Based on RISC-V implementation and optimized for AArch64


Sorry, but where did this code come from? I can't find any reference, and it doesn't look like it was implemented by porting axcpu's user_copy implementation on RISC-V to AArch64...

It should account for possible page faults and set up the exception table.

Co-authored-by: Asakura Mizu <[email protected]>

pengzechen and others added 14 commits September 12, 2025 21:18

feat (aarch64) UserContext.run can move to user task.

a6b3b95

when lower exception come, UserContext.run can return a reason.

handle lower exception in proper position.

d00ddf9

add some debug fn

d4c39e8

Merge branch 'debin'

42643db

user_entry

06e04bd

add task exit

fe440f9

优化任务退出宏，使用SAVE_REGS宏保存寄存器状态，并添加_user_trap_entry函数以处理用户陷阱。

d7a0859

fix: aarch64 user entry and exit

3f28364

fix: irq

3d4a8ce

fix: exception

19937d9

fmt code

bb76db2

merge main

90a9759

fmt code

5573554

fmt code

ae356c8

Azure-stars reviewed Sep 18, 2025

View reviewed changes

AsakuraMizu requested changes Sep 18, 2025

View reviewed changes

ZR233 and others added 3 commits September 19, 2025 12:38

impl arg0

f1db902

Update src/aarch64/context.rs

e0ca0fc

Co-authored-by: Asakura Mizu <[email protected]>

improve context

998dcc8

	fn handle_data_abort(tf: &TrapFrame, iss: u64) {
	let wnr = (iss & (1 << 6)) != 0; // WnR: Write not Read
	let cm = (iss & (1 << 8)) != 0; // CM: Cache maintenance
	let access_flags = if wnr & !cm {
	PageFaultFlags::WRITE
	} else {
	PageFaultFlags::READ
	};
	let vaddr = va!(FAR_EL1.get() as usize);

	// TODO: fixup_exception
	// Only handle Translation fault and Permission fault
	if !matches!(iss & 0b111100, 0b0100 \| 0b1100) // IFSC or DFSC bits
	\|\| !handle_trap!(PAGE_FAULT, vaddr, access_flags)
	{
	panic!(
	"Unhandled EL1 Data Abort @ {:#x}, fault_vaddr={:#x}, ESR={:#x} ({:?}):\n{:#x?}\n{}",
	tf.elr,
	vaddr,
	ESR_EL1.get(),
	access_flags,
	tf,
	tf.backtrace()
	);
	}
	}

		// AArch64 user space safe memory copy
		// Based on RISC-V implementation and optimized for AArch64

		.Ldeadloop:
		b .Ldeadloop

feat: add aarch64 user support #1

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feat: add aarch64 user support #1

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ZR233 commented Sep 18, 2025

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