low-latency CPU standby mode#70
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Implementing cpu standby LPM introduces more intermediate power states for retention. Thus increasing the power level for PLAT_MAX_RET_STATE and in association PLAT_MAX_OFF_STATE Signed-off-by: Scaria Kochidanadu <[email protected]>
plat_psci_common.c is not used by am62l, thus removing it from plat_common.mk. Adding plat_psci_common.c in the board specific board.mk to build it for the boards that use it. Signed-off-by: Scaria Kochidanadu <[email protected]>
Executing WFI at EL3 without explicitly configuring scr_el3 leads to unstable behaviour and systems hangs on entering the low power mode. Save and update scr_el3 with required bits for routing of interrupts and restoring original scr_el3 value on resume to ensure correct entry and exit from WFI. Signed-off-by: Scaria Kochidanadu <[email protected]>
Introduce a new low-latency CPU standby mode using the OSI mode in PSCI and leveraging the cpuidle framework in the kernel. Using the cpuidle framework, when the cores are idle, the cpuidle governor opportunistically selects among the idle-states that are present to enter a low power state. In the low latency cluster idle state implemented: DDR is in auto self refresh, auto clock gating is enabled, few LPSCs are disabled and PLLs are in Bypass or running at low frequency to save power. Signed-off-by: Scaria Kochidanadu <[email protected]>
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Adds a new low-latency CPU standby LPM in the AM62L SoC.
Using the OSI mode of PSCI in ATF and the cpuidle driver in the kernel,
the system can enter idle states opportunistically when the OS deems the cpus to be idle.