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Fix write logic in SP model#14

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maliberty merged 1 commit intoThe-OpenROAD-Project:mainfrom
povik:fix-sp-write
Jan 15, 2026
Merged

Fix write logic in SP model#14
maliberty merged 1 commit intoThe-OpenROAD-Project:mainfrom
povik:fix-sp-write

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@povik povik commented Jan 13, 2026

The simulation model for SP memories wasn't describing a functional memory as on a write it was only setting bits, never clearing them. Fix the write statement.

The bitwise OR operation may have been a remnant of a write mask. Before commit 0fb7f8c ("Re-factored fakeram to support sp/dp ram/regfile") there was a commented-out line:

# V_file.write('            mem[addr_in] <= (wd_in & w_mask_in) | (mem[addr_in] & ~w_mask_in);\n')

The simulation model for SP memories wasn't describing a functional
memory as on a write it was only setting bits, never clearing them.
Fix the write statement.

The bitwise OR operation may have been a remnant of a write mask. Before
commit 0fb7f8c ("Re-factored fakeram to support sp/dp ram/regfile")
there was a commented-out line:

    # V_file.write('            mem[addr_in] <= (wd_in & w_mask_in) | (mem[addr_in] & ~w_mask_in);\n')

Signed-off-by: Martin Povišer <povik@cutebit.org>
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Looks good. I see some test failures that are unrelated to your change, so I'll fix those once yours gets merged.

@maliberty maliberty merged commit 4fb92f4 into The-OpenROAD-Project:main Jan 15, 2026
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3 participants