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Remove - unneeded code Signed-off-by: louiic <[email protected]> Signed-off-by: My Nguyen <[email protected]>
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3 files changed

+76
-85
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‎flow/designs/asap7/megaboom/io.tcl‎

Lines changed: 61 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -1,56 +1,66 @@
11
proc natural_sort {list} {
2-
return [lsort -command natural_compare $list]
2+
return [lsort -command natural_compare $list]
33
}
4+
45
# Custom comparison function
56
proc natural_compare {str1 str2} {
6-
set list1 [split $str1]
7-
set list2 [split $str2]
8-
set len [expr {min([llength $list1], [llength $list2])}]
9-
for {set i 0} {$i < $len} {incr i} {
10-
set part1 [lindex $list1 $i]
11-
set part2 [lindex $list2 $i]
12-
if {$part1 ne $part2} {
13-
if {[string is integer -strict $part1] && [string is integer -strict $part2]} {
14-
return [expr {$part1 - $part2}]
15-
} else {
16-
return [string compare $part1 $part2]
17-
}
18-
}
7+
set list1 [split $str1]
8+
set list2 [split $str2]
9+
set len [expr {min([llength $list1], [llength $list2])}]
10+
for {set i 0} {$i < $len} {incr i} {
11+
set part1 [lindex $list1 $i]
12+
set part2 [lindex $list2 $i]
13+
if {$part1 ne $part2} {
14+
if {[string is integer -strict $part1] && [string is integer -strict $part2]} {
15+
return [expr {$part1 - $part2}]
16+
} else {
17+
return [string compare $part1 $part2]
18+
}
1919
}
20-
return [expr {[llength $list1] - [llength $list2]}] ;# If all parts are equal, compare by length
20+
}
21+
return [expr {[llength $list1] - [llength $list2]}] ;# If all parts are equal, compare by length
2122
}
2223

23-
24+
# return regular expression
2425
proc match_pins { regex } {
25-
set pins {}
26-
# The regex for get_ports is not the tcl regex
27-
foreach pin [get_ports -regex .*] {
28-
set input [get_property $pin name]
29-
# We want the Tcl regex
30-
if {![regexp $regex $input]} {
31-
continue
32-
}
33-
lappend pins [get_property $pin name]
26+
set pins {}
27+
# The regex for get_ports is not the tcl regex
28+
foreach pin [get_ports -regex .*] {
29+
set input [get_property $pin name]
30+
# We want the Tcl regex
31+
if {![regexp $regex $input]} {
32+
continue
3433
}
35-
return [natural_sort $pins]
34+
lappend pins [get_property $pin name]
35+
}
36+
return [natural_sort $pins]
3637
}
3738

39+
#--------------------------------------------------------------------------------
3840
set block [ord::get_db_block]
3941

42+
# set metal pitch for used with pin placment
43+
# should be set to minimum of 2 tracks
4044
set m4pitch 0.048
4145
set m5pitch 0.048
4246

47+
# create array for IO pins on top, bottom, left and right
48+
# each entry construct can be of one of the following
49+
# start <starting point for the following pin list>
50+
# pitch <pin ptich / spacing to use>
51+
# <pin>
52+
# <pin>
4353
array set pinGroups [list]
44-
set pinGroups(top) [ list \
45-
"pitch $m5pitch" \
54+
set pinGroups(top) [list \
55+
"pitch [expr $m5pitch * 8]" \
4656
"start 500" \
4757
"io_debug_req" \
4858
"io_debug_resp" \
4959
"io_interrupts" \
5060
]
5161

5262
set pinGroups(left) [ list \
53-
"pitch $m4pitch" \
63+
"pitch [expr $m4pitch * 8]" \
5464
"start 200" \
5565
"io_l2_axi4_0_ar" \
5666
"io_l2_axi4_0_aw" \
@@ -60,7 +70,7 @@ set pinGroups(left) [ list \
6070
]
6171

6272
set pinGroups(right) [ list \
63-
"pitch $m4pitch" \
73+
"pitch [expr $m4pitch * 8]" \
6474
"start 200" \
6575
"io_mem_axi4_0_ar" \
6676
"io_mem_axi4_0_aw" \
@@ -75,31 +85,30 @@ set pinGroups(right) [ list \
7585
"io_mmio_axi4_0_w" \
7686
]
7787

78-
88+
# process pin grouppings from instruction above
89+
# go thru each item in the pin grouping and issue
90+
# the ORFS constraint
7991
foreach side [array names pinGroups] {
8092
set pStart 0
81-
set pStop 0
82-
set pitch 0
93+
set pStop 0
94+
set pitch 0
8395
foreach ex $pinGroups($side) {
84-
if { [regexp {pitch (\S+)} $ex - number] } {
85-
set pitch $number
86-
continue
87-
}
88-
if { [regexp {start (\d+)} $ex - number] } {
89-
set pStart $number
90-
set pStop $number
91-
continue
92-
}
93-
if { [regexp {break (\d+)} $ex - number] } {
94-
set pStart [expr $pStart + $number]
95-
continue
96-
}
97-
#set pins [concat {*}[match_pins ${ex}.*]]
98-
set pins [match_pins ${ex}.*]
99-
set pStop [expr $pStart + (($pitch * 8) * [llength $pins])]
100-
set_io_pin_constraint -region ${side}:${pStart}-${pStop} -pin_names $pins
101-
set pStart [expr $pStop + ($pitch * 20)]
96+
if { [regexp {pitch (\S+)} $ex - number] } {
97+
set pitch $number
98+
continue
99+
}
100+
if { [regexp {start (\d+)} $ex - number] } {
101+
set pStart $number
102+
set pStop $number
103+
continue
104+
}
105+
if { [regexp {break (\d+)} $ex - number] } {
106+
set pStart [expr $pStart + $number]
107+
continue
108+
}
109+
set pins [match_pins ${ex}.*]
110+
set pStop [expr $pStart + ($pitch * [llength $pins])]
111+
set_io_pin_constraint -region ${side}:${pStart}-${pStop} -pin_names $pins
102112
}
103113
}
104114

105-
#place_pins -hor_layer M4 -ver_layer M5

‎flow/designs/asap7/megaboom/macro-placement.tcl‎

Lines changed: 14 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1,26 +1,22 @@
1-
set block [ord::get_db_block]
2-
set units [$block getDefUnits]
1+
# pre place all macro
2+
#
3+
set block [ord::get_db_block]
4+
set units [$block getDefUnits]
35

46
set coreArea [$block getCoreArea]
5-
set xMin [$coreArea xMin]
6-
set yMin [$coreArea yMin]
7+
set xMin [$coreArea xMin]
8+
set yMin [$coreArea yMin]
79

8-
foreach uname [list \
9-
] {
10-
11-
set inst [$block findInst $uname]
12-
13-
#$inst setOrient R0
14-
#$inst setOrigin x y
15-
#$inst setPlacementStatus FIRM
16-
}
17-
18-
set x $xMin
19-
set y $yMin
10+
# macro pins on M4 starts with an offset of 0.012 from the bottom
11+
# of the macro; then, will need to adjust the placement of the macro
12+
# such that the pins will be on M4 grid
2013
set y [expr $yMin - int(0.012 * $units)]
14+
15+
# the algorithm is to place macro such what if 2 macros are side by side,
16+
# the macro should be flip alternately
2117
set orientList [list R0 MY]
2218
set flag 1
23-
foreach uname [list \
19+
foreach instName [list \
2420
coreplex/RocketTile/frontend/icache/_T_850/_T_850_ext/u_ram \
2521
coreplex/RocketTile/frontend/icache/_T_869/_T_850_ext/u_ram \
2622
coreplex/RocketTile/frontend/icache/_T_888/_T_850_ext/u_ram \
@@ -47,7 +43,7 @@ foreach uname [list \
4743
coreplex/RocketTile/core/bpd_stage/br_predictor/brob/entries_info/u_entries_info_ext/u_regfile \
4844
] {
4945
set orient [lindex $orientList $flag]
50-
set inst [$block findInst $uname]
46+
set inst [$block findInst $instName]
5147

5248
set bbox [$inst getBBox]
5349
set w [$bbox getDX]
@@ -67,8 +63,5 @@ foreach uname [list \
6763
set bx2 [expr $y]
6864
set by2 [expr $y + $h]
6965

70-
# set b [odb::dbBlockage_create $block $bx1 $by1 $bx2 $by2]
71-
7266
set flag [expr {! $flag}]
7367
}
74-

‎flow/designs/asap7/megaboom/pdn.tcl‎

Lines changed: 1 addition & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -35,18 +35,7 @@ add_pdn_connect -grid {top} -layers {M8 M9}
3535

3636
####################################
3737
# macro grid
38-
# fakeram_256x128
39-
# fakeram_256x64
40-
# fakeram_64x20
41-
# fakeram_64x22
42-
# fakeregfile_128x64
43-
# fakeregfile_32x46
44-
# fakeregfile_64x64
45-
####################################
46-
#define_pdn_grid -name {CORE_macro_grid_1} -voltage_domains {CORE} -macro -orient {R0 R180 MX MY} -cells {.*}
47-
#add_pdn_connect -grid {CORE_macro_grid_1} -layers {M4 M5}
48-
#
49-
#
38+
####################################
5039
# The halo around the macro prevents pdn from blocking pin access
5140
define_pdn_grid -name {fakeram} -macro -cells {fake.*} -halo "3.0 3.0 3.0 3.0" -voltage_domains {CORE}
5241
add_pdn_connect -grid {fakeram} -layers {M4 M5}

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