We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 2e73222 commit 30d2df6Copy full SHA for 30d2df6
flow/designs/asap7/mock-array-big/Element/constraints.sdc
@@ -8,6 +8,8 @@ set clk_period 8000
8
9
set clk_port [get_ports $clk_port_name]
10
create_clock -period $clk_period -waveform [list 0 [expr $clk_period / 2]] -name $clk_name $clk_port
11
+set_clock_uncertainty -setup 20.0 [get_clocks $clk_name]
12
+set_clock_uncertainty -hold 20.0 [get_clocks $clk_name]
13
14
# io_ins_x -> REG_x
15
set_input_delay -clock $clk_name -min [expr $clk_period / 2] [get_ports {io_ins_*}]
0 commit comments