@@ -7,7 +7,7 @@ easily integrate and test a new technology in to the OpenROAD RTL to GDS
77flow. OpenROAD allows you to integrate any PDK (Process Design Kit) for any
88feature size and implement a fully open-sourced RTL-GDSII flow (synthesizable
99Verilog to merged GDSII). The OpenROAD flow has been validated for feature
10- sizes down to 7nm and used to design and tapeout over 100 ASIC and SoCs
10+ sizes down to 7nm and used to design and tapeout over 600 ASIC and SoCs
1111to date.
1212
1313## Prerequisites
@@ -58,7 +58,7 @@ each other unless otherwise stated.
5858Make the following edits to the Makefile (located in ` flow/Makefile ` )
5959so that OpenROAD can run the flow on a design using the new platform.
6060
61- At the beginning of the Makefile, there is a block of ` DESIGN_CONFIG `
61+ At the beginning of the Makefile, there is a block of ` DESIGN_CONFIG `
6262variables that are commented out. These variables tell OpenROAD which
6363design to run and on what platform. ` DESIGN_CONFIG ` specifically points
6464to a ` config.mk ` file located in the designs directory for the respective
@@ -70,8 +70,8 @@ already made which can be used with any platform (see `flow/designs/src`
7070for a list of usable designs). For example, a ` DESIGN_CONFIG ` variable
7171using the ` gcd ` design on a new platform would look as follows:
7272
73- ```
74- # Makefile
73+ ``` {code-block} Makefile
74+ :caption: Makefile
7575DESIGN_CONFIG=./designs/MyNewPlatform/gcd/config.mk
7676```
7777
@@ -83,8 +83,8 @@ Directory](content:design:directory) section of this document.
8383Create a directory for the new technology inside ` flow/platforms ` to contain
8484the necessary files for the OpenROAD flow.
8585
86- ```
87- $ mkdir flow/platforms/MyNewPlatform
86+ ``` shell
87+ mkdir flow/platforms/MyNewPlatform
8888```
8989(content:design: directory )=
9090### Design Directory
@@ -95,17 +95,18 @@ to contain the relevant files and directories for all the designs for the
9595flow in that specific platform. Each design requires its own ` config.mk `
9696and ` constraint.sdc ` files.
9797
98+ :::{tip}
9899Follow the steps below to create the necessary directories and files.
99- ** NOTE: gcd is just an example and not a required name.** :
100+ Note gcd is just an example and not a required name.
100101
102+ ``` shell
103+ mkdir -p flow/designs/MyNewPlatform/gcd
104+ touch flow/designs/MyNewPlatform/gcd/config.mk
105+ touch flow/designs/MyNewPlatform/gcd/constraint.sdc
101106```
102- $ mkdir -p flow/designs/MyNewPlatform/gcd
103- $ touch flow/designs/MyNewPlatform/gcd/config.mk
104- $ touch flow/designs/MyNewPlatform/gcd/constraint.sdc
105- ```
106-
107107This creates two directories MyNewPlatform and ` gcd ` and two empty files
108108` config.mk ` and ` constraint.sdc ` in ` flow/designs/MyNewPlatform/gcd ` .
109+ :::
109110
110111### Platform Configuration
111112
@@ -147,9 +148,8 @@ descriptor of all variables see [here](../user/FlowVariables.md).
147148
148149Following is a sample ` config.mk ` file for the ` gcd ` design:
149150
150- ```
151- #config.mk
152- ###########################
151+ ``` {code-block} shell
152+ :caption: config.mk
153153export DESIGN_NAME = gcd
154154export PLATFORM = sky130hd
155155
@@ -172,9 +172,8 @@ need to be consistent with the liberty time units. Here’s an example of
172172a ` constraint.sdc ` file which defines a clock ` clk ` with a period of 8.4
173173nanoseconds (nanoseconds being consistent with the liberty time units).
174174
175- ```
176- #constraint.sdc
177- ############################
175+ ``` {code-block} tcl
176+ :caption: constraint.sdc
178177create_clock [get_ports clk] -period 8.4 #Units are in nanoseconds
179178```
180179
@@ -191,10 +190,10 @@ have all relevant files in one localized directory. The `.lib`, `.lef`, and
191190` .gds ` reside in directories named respectively for the specific technology.
192191
193192For example:
194- ```
195- $ mdkir flow/platforms/MyNewPlatform/lib
196- $ mdkir flow/platforms/MyNewPlatform/lef
197- $ mdkir flow/platforms/MyNewPlatform/gds
193+ ``` shell
194+ mdkir flow/platforms/MyNewPlatform/lib
195+ mdkir flow/platforms/MyNewPlatform/lef
196+ mdkir flow/platforms/MyNewPlatform/gds
198197```
199198
200199A merged GDS file may be used instead of adding every individual ` .gds `
@@ -218,9 +217,8 @@ design.
218217To create this module, a gated clock standard cell is required. This standard
219218cell is used to create the generic module ` OPENROAD_CLKGATE ` , as shown below.
220219
221- ```
222- // cells_clkgate.v
223- //////////////////////////
220+ ``` {code-block} verilog
221+ :caption: cells_clkgate.v
224222module OPENROAD_CLKGATE (CK, E, GCK);
225223 input CK;
226224 input E;
@@ -232,10 +230,9 @@ endmodule
232230
233231An example instantiation of this module in a user design is shown below.
234232
235- ```
236- // buffer.v
233+ ``` {code-block} verilog
234+ :caption: buffer.v
237235// This is not a platform file, this is an example user design
238- //////////////////////////
239236
240237module buffer (clk, enable, in, out);
241238
@@ -267,9 +264,8 @@ level-sensitive latch.
267264
268265This file is only required if you want to infer latches for your design.
269266
270- ```
271- // cells_latch.v
272- //////////////////////////
267+ ``` {code-block} verilog
268+ :caption: cells_latch.v
273269module $_DLATCH_P_(input E, input D, output Q);
274270 <d_latch_std_cell> _TECHMAP_REPLACE_ (
275271 .D (D),
@@ -295,11 +291,9 @@ layer resources, set which routing heuristic to use when routing, etc. It’s
295291recommended to use the default ` fastroute.tcl ` due to its simplicity and
296292effectiveness. Following is the default FastRoute configuration file.
297293
298- ```
299- # fastroute.tcl
300- #####################
294+ ``` {code-block} tcl
295+ :caption: fastroute.tcl
301296set_global_routing_layer_adjustment $::env(MIN_ROUTING_LAYER)-$::env(MAX_ROUTING_LAYER) 0.5
302-
303297set_routing_layers -signal $::env(MIN_ROUTING_LAYER)-$::env(MAX_ROUTING_LAYER)
304298```
305299
@@ -323,9 +317,8 @@ to the `LAYER` definition section for each metal in the tech LEF. Following
323317is a generalized metal tracks configuration file with five metal tracks
324318defined. ** Units are in microns** .
325319
326- ```
327- # make_tracks.tcl
328- ###############################
320+ ``` {code-block} tcl
321+ :caption: make_tracks.tcl
329322make_tracks metal1 -x_offset 0.24 -x_pitch 0.82 -y_offset 0.24 -y_pitch 0.82
330323make_tracks metal2 -x_offset 0.28 -x_pitch 0.82 -y_offset 0.28 -y_pitch 0.82
331324make_tracks metal3 -x_offset 0.28 -x_pitch 0.82 -y_offset 0.28 -y_pitch 0.82
@@ -334,8 +327,7 @@ make_tracks metal5 -x_offset 0.28 -x_pitch 0.82 -y_offset 0.28 -y_pitch 0.82
334327```
335328
336329Following is the ` LAYER ` definition for ` metal1 ` in the ` sky130hd ` tech LEF.
337-
338- ```
330+ ```
339331LAYER met1
340332 TYPE ROUTING ;
341333 DIRECTION HORIZONTAL ;
@@ -397,9 +389,8 @@ values. Often, per-unit-length values are available in the PDK user guide. For
397389of a ` setRC ` configuration file which sets the resistance and capacitance
398390of five metal layers, four vias, one signal wire, and one clock wire.
399391
400- ```
401- # setRC.tcl
402- #######################
392+ ``` {code-block} tcl
393+ :caption: setRC.tcl
403394set_layer_rc -layer M1 -capacitance 1.449e-04 -resistance 8.929e-04
404395set_layer_rc -layer M2 -capacitance 1.331e-04 -resistance 8.929e-04
405396set_layer_rc -layer M3 -capacitance 1.464e-04 -resistance 1.567e-04
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