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Merge remote-tracking branch 'origin/master' into tighten-2508
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15 files changed

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docs/user/FlowVariables.md

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@@ -163,6 +163,8 @@ configuration file.
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| <a name="MACRO_WRAPPERS"></a>MACRO_WRAPPERS| The wrapper file that replaces existing macros with their wrapped version.| |
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| <a name="MAKE_TRACKS"></a>MAKE_TRACKS| Tcl file that defines add routing tracks to a floorplan.| |
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| <a name="MATCH_CELL_FOOTPRINT"></a>MATCH_CELL_FOOTPRINT| Enforce sizing operations to only swap cells that have the same layout boundary.| 0|
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| <a name="MAX_REPAIR_ANTENNAS_ITER_DRT"></a>MAX_REPAIR_ANTENNAS_ITER_DRT| Defines the maximum number of iterations post-detailed routing repair antennas will run.| 5|
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| <a name="MAX_REPAIR_ANTENNAS_ITER_GRT"></a>MAX_REPAIR_ANTENNAS_ITER_GRT| Defines the maximum number of iterations post global routing repair antennas will run.| 5|
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| <a name="MAX_ROUTING_LAYER"></a>MAX_ROUTING_LAYER| The highest metal layer name to be used in routing.| |
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| <a name="MIN_BUF_CELL_AND_PORTS"></a>MIN_BUF_CELL_AND_PORTS| Used to insert a buffer cell to pass through wires. Used in synthesis.| |
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| <a name="MIN_ROUTING_LAYER"></a>MIN_ROUTING_LAYER| The lowest metal layer name to be used in routing.| |
@@ -233,6 +235,7 @@ configuration file.
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| <a name="SYNTH_MEMORY_MAX_BITS"></a>SYNTH_MEMORY_MAX_BITS| Maximum number of bits for memory synthesis.| 4096|
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| <a name="SYNTH_MINIMUM_KEEP_SIZE"></a>SYNTH_MINIMUM_KEEP_SIZE| For hierarchical synthesis, we keep modules of larger area than given by this variable and flatten smaller modules. The area unit used is the size of a basic nand2 gate from the platform's standard cell library. The default value is platform specific.| 0|
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| <a name="SYNTH_NETLIST_FILES"></a>SYNTH_NETLIST_FILES| Skips synthesis and uses the supplied netlist files. If the netlist files contains duplicate modules, which can happen when using hierarchical synthesis on indvidual netlist files and combining here, subsequent modules are silently ignored and only the first module is used.| |
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| <a name="SYNTH_RETIME_MODULES"></a>SYNTH_RETIME_MODULES| List of modules to apply retiming to. These modules must not get dissolved and as such they should either be the top module or be included in SYNTH_KEEP_MODULES. This is an experimental option and may cause adverse effects.| |
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| <a name="SYNTH_WRAPPED_OPERATORS"></a>SYNTH_WRAPPED_OPERATORS| Synthesize multiple architectural options for each arithmetic operator in the design. These options are available for switching among in later stages of the flow.| |
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| <a name="TAPCELL_TCL"></a>TAPCELL_TCL| Path to Endcap and Welltie cells file.| |
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| <a name="TAP_CELL_NAME"></a>TAP_CELL_NAME| Name of the cell to use in tap cell insertion.| |
@@ -269,6 +272,7 @@ configuration file.
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- [SYNTH_MEMORY_MAX_BITS](#SYNTH_MEMORY_MAX_BITS)
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- [SYNTH_MINIMUM_KEEP_SIZE](#SYNTH_MINIMUM_KEEP_SIZE)
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- [SYNTH_NETLIST_FILES](#SYNTH_NETLIST_FILES)
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- [SYNTH_RETIME_MODULES](#SYNTH_RETIME_MODULES)
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- [SYNTH_WRAPPED_OPERATORS](#SYNTH_WRAPPED_OPERATORS)
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- [TIEHI_CELL_AND_PORT](#TIEHI_CELL_AND_PORT)
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- [TIELO_CELL_AND_PORT](#TIELO_CELL_AND_PORT)
@@ -388,6 +392,7 @@ configuration file.
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- [DETAILED_METRICS](#DETAILED_METRICS)
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- [GLOBAL_ROUTE_ARGS](#GLOBAL_ROUTE_ARGS)
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- [HOLD_SLACK_MARGIN](#HOLD_SLACK_MARGIN)
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- [MAX_REPAIR_ANTENNAS_ITER_GRT](#MAX_REPAIR_ANTENNAS_ITER_GRT)
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- [MAX_ROUTING_LAYER](#MAX_ROUTING_LAYER)
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- [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER)
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- [PRE_GLOBAL_ROUTE_TCL](#PRE_GLOBAL_ROUTE_TCL)
@@ -408,6 +413,7 @@ configuration file.
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- [DETAILED_ROUTE_END_ITERATION](#DETAILED_ROUTE_END_ITERATION)
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- [FILL_CELLS](#FILL_CELLS)
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- [MATCH_CELL_FOOTPRINT](#MATCH_CELL_FOOTPRINT)
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- [MAX_REPAIR_ANTENNAS_ITER_DRT](#MAX_REPAIR_ANTENNAS_ITER_DRT)
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- [MAX_ROUTING_LAYER](#MAX_ROUTING_LAYER)
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- [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER)
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- [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW)

flow/Makefile

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@@ -414,9 +414,8 @@ do-$(1)$(if $(4),$(4),):
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cp $(RESULTS_DIR)/$(2) $(RESULTS_DIR)/$(1)$(if $(4),$(4),.odb)
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endef
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417+
$(eval $(call do-step,1_3_synth,$(RESULTS_DIR)/1_synth.v $(RESULTS_DIR)/1_synth.sdc,synth_odb))
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418-
# STEP 1: Translate verilog to odb
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#-------------------------------------------------------------------------------
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$(eval $(call do-step,2_1_floorplan,$(RESULTS_DIR)/1_synth.v $(RESULTS_DIR)/1_synth.sdc $(TECH_LEF) $(SC_LEF) $(ADDITIONAL_LEFS) $(FOOTPRINT) $(SIG_MAP_FILE) $(FOOTPRINT_TCL) $(DONT_USE_SC_LIB),floorplan))
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$(eval $(call do-copy,2_floorplan,2_1_floorplan.sdc,,.sdc))
@@ -775,13 +774,7 @@ nuke: clean_test clean_issues
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$(foreach file,$(RESULTS_DEF) $(RESULTS_GDS) $(RESULTS_OAS),klayout_$(file)): klayout_%: $(OBJECTS_DIR)/klayout.lyt
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$(KLAYOUT_CMD) -nn $(OBJECTS_DIR)/klayout.lyt $(RESULTS_DIR)/$*
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.PHONY: gui_synth
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gui_synth:
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$(OPENROAD_GUI_CMD) $(SCRIPTS_DIR)/sta-synth.tcl
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.PHONY: open_synth
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open_synth:
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$(OPENROAD_NO_EXIT_CMD) $(SCRIPTS_DIR)/sta-synth.tcl
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$(eval $(call OPEN_GUI_SHORTCUT,synth,1_synth.odb))
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$(eval $(call OPEN_GUI_SHORTCUT,floorplan,2_floorplan.odb))
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$(eval $(call OPEN_GUI_SHORTCUT,place,3_place.odb))
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$(eval $(call OPEN_GUI_SHORTCUT,cts,4_cts.odb))

flow/designs/sky130hs/jpeg/rules-base.json

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@@ -28,7 +28,7 @@
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"compare": "<="
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},
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"globalroute__antenna_diodes_count": {
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"value": 141,
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"value": 87,
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"compare": "<="
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},
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"detailedroute__route__wirelength": {
@@ -40,11 +40,11 @@
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"compare": "<="
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},
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"detailedroute__antenna__violating__nets": {
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"value": 0,
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"value": 1,
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"compare": "<="
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},
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"detailedroute__antenna_diodes_count": {
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"value": 154,
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"value": 86,
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"compare": "<="
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},
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"finish__timing__setup__ws": {

flow/platforms/ihp-sg13g2/config.mk

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@@ -115,7 +115,7 @@ export MAX_ROUTING_LAYER ?= Metal5
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#export VIA_IN_PIN_MIN_LAYER ?= Metal1
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#export VIA_IN_PIN_MAX_LAYER ?= Metal1
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#export DISABLE_VIA_GEN ?= 1
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#
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# Define fastRoute tcl
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export FASTROUTE_TCL ?= $(PLATFORM_DIR)/fastroute.tcl
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flow/platforms/sky130hd/config.mk

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@@ -117,6 +117,7 @@ export PLACE_DENSITY ?= 0.60
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export MIN_ROUTING_LAYER ?= met1
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export MIN_CLK_ROUTING_LAYER ?= met3
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export MAX_ROUTING_LAYER ?= met5
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#
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# Define fastRoute tcl
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export FASTROUTE_TCL ?= $(PLATFORM_DIR)/fastroute.tcl

flow/platforms/sky130hs/config.mk

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@@ -79,6 +79,7 @@ export PLACE_DENSITY ?= 0.50
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export MIN_ROUTING_LAYER = met1
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export MIN_CLK_ROUTING_LAYER = met3
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export MAX_ROUTING_LAYER = met5
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#
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# Define fastRoute tcl
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export FASTROUTE_TCL ?= $(PLATFORM_DIR)/fastroute.tcl

flow/scripts/abc_retime.script

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st
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retime -v -o
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map

flow/scripts/detail_route.tcl

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@@ -52,12 +52,15 @@ set all_args [concat [list \
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log_cmd detailed_route {*}$all_args
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55-
if { ![env_var_equals SKIP_ANTENNA_REPAIR_POST_DRT 1] } {
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if {
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![env_var_equals SKIP_ANTENNA_REPAIR_POST_DRT 1] &&
57+
[env_var_exists_and_non_empty MAX_REPAIR_ANTENNAS_ITER_DRT]
58+
} {
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set repair_antennas_iters 1
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if { [repair_antennas] } {
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detailed_route {*}$all_args
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}
60-
while { [check_antennas] && $repair_antennas_iters < 5 } {
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while { [check_antennas] && $repair_antennas_iters < $::env(MAX_REPAIR_ANTENNAS_ITER_DRT) } {
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repair_antennas
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detailed_route {*}$all_args
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incr repair_antennas_iters

flow/scripts/global_route.tcl

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@@ -86,9 +86,12 @@ proc global_route_helper { } {
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log_cmd global_route -end_incremental \
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-congestion_report_file $::env(REPORTS_DIR)/congestion_post_recover_power.rpt
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if { ![env_var_equals SKIP_ANTENNA_REPAIR 1] } {
89+
if {
90+
![env_var_equals SKIP_ANTENNA_REPAIR 1] &&
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[env_var_exists_and_non_empty MAX_REPAIR_ANTENNAS_ITER_GRT]
92+
} {
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puts "Repair antennas..."
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repair_antennas -iterations 5
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repair_antennas -iterations $::env(MAX_REPAIR_ANTENNAS_ITER_GRT)
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check_placement -verbose
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check_antennas -report_file $::env(REPORTS_DIR)/grt_antennas.log
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}

flow/scripts/report_metrics.tcl

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@@ -32,6 +32,11 @@ proc report_metrics { stage when { include_erc true } { include_clock_skew true
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report_worst_slack >> $filename
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report_worst_slack_metric
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report_worst_slack_metric -hold
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report_puts "\n=========================================================================="
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report_puts "$when report_clock_min_period"
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report_puts "--------------------------------------------------------------------------"
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report_clock_min_period -include_port_paths >> $filename
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report_fmax_metric
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if { $include_clock_skew && $::env(REPORT_CLOCK_SKEW) } {

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