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2 parents 5bd5bff + 6f22938 commit f32249dCopy full SHA for f32249d
flow/scripts/load.tcl
@@ -102,8 +102,11 @@ proc run_equivalence_test {} {
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write_eqy_verilog 4_after_rsz.v
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write_eqy_script
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- file delete -force $::env(LOG_DIR)/4_eqy_output
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- eval exec eqy -d $::env(LOG_DIR)/4_eqy_output $::env(OBJECTS_DIR)/4_eqy_test.eqy > $::env(LOG_DIR)/4_equivalence_check.log
+ eval exec eqy -d $::env(LOG_DIR)/4_eqy_output \
+ --force \
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+ --jobs $::env(NUM_CORES) \
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+ $::env(OBJECTS_DIR)/4_eqy_test.eqy \
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+ > $::env(LOG_DIR)/4_equivalence_check.log
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set count [exec grep -c "Successfully proved designs equivalent" $::env(LOG_DIR)/4_equivalence_check.log]
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if { $count == 0 } {
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error "Repair timing output failed equivalence test"
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