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asap7/ethmac_lvt: study placement densities and grt #2735
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Merged
maliberty
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The-OpenROAD-Project:master
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Pinata-Consulting:ethmac-lvt-grt
Jan 30, 2025
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,59 @@ | ||
| load("@bazel-orfs//:sweep.bzl", "orfs_sweep") | ||
| load("//util:plot_congestion.bzl", "plot_congestion") | ||
|
|
||
| # Format densities, rounding to 2 decimal places. | ||
| SWEEPS = { | ||
| "PLACE_DENSITY": [str(0.60 + x * 0.01 + 0.005)[:4] for x in range(20)], | ||
| "CORE_UTILIZATION": [str(40 + x * 5) for x in range(4)], | ||
| } | ||
|
|
||
| SWEEP = "PLACE_DENSITY" | ||
|
|
||
| orfs_sweep( | ||
| name = "ethmac_lvt", | ||
| arguments = { | ||
| # Faster builds | ||
| "SKIP_INCREMENTAL_REPAIR": "1", | ||
| "GPL_TIMING_DRIVEN": "0", | ||
| # Various | ||
| "SDC_FILE": "$(location :constraint.sdc)", | ||
| "ABC_AREA": "1", | ||
| "CORE_UTILIZATION": "40", | ||
| "CORE_ASPECT_RATIO": "1", | ||
| "CORE_MARGIN": "2", | ||
| "PLACE_DENSITY": "0.60", | ||
| "ASAP7_USELVT": "1", | ||
| "RECOVER_POWER": "1", | ||
| "ADDITIONAL_LIBS": "$(LIB_DIR)/asap7sc7p5t_AO_RVT_FF_nldm_211120.lib.gz \ | ||
| $(LIB_DIR)/asap7sc7p5t_INVBUF_RVT_FF_nldm_220122.lib.gz \ | ||
| $(LIB_DIR)/asap7sc7p5t_OA_RVT_FF_nldm_211120.lib.gz \ | ||
| $(LIB_DIR)/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz \ | ||
| $(LIB_DIR)/asap7sc7p5t_SEQ_RVT_FF_nldm_220123.lib", | ||
| "ADDITIONAL_GDS": "$(PLATFORM_DIR)/gds/asap7sc7p5t_28_R_220121a.gds", | ||
| "ADDITIONAL_LEFS": "$(PLATFORM_DIR)/lef/asap7sc7p5t_28_R_1x_220121a.lef", | ||
| }, | ||
| other_variants = {"base": {}}, | ||
| sources = { | ||
| "SDC_FILE": [":constraint.sdc"], | ||
| }, | ||
| sweep = { | ||
| value: { | ||
| "arguments": { | ||
| SWEEP: value, | ||
| }, | ||
| "previous_stage": { | ||
| "floorplan": "ethmac_lvt_synth", | ||
| }, | ||
| } | ||
| for value in SWEEPS[SWEEP] | ||
| }, | ||
| top = "ethmac", | ||
| verilog_files = ["//:ethmac_lvt_src"], | ||
| ) | ||
|
|
||
| plot_congestion( | ||
| name = "plot", | ||
| srcs = [":ethmac_lvt_{value}_grt".format(value = value) for value in SWEEPS[SWEEP]], | ||
| argument = SWEEP, | ||
| values = SWEEPS[SWEEP], | ||
| ) |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,122 @@ | ||
| load("@bazel-orfs//:openroad.bzl", "orfs_flow") | ||
| load("@bazel-orfs//:sweep.bzl", "orfs_sweep") | ||
| load("//util:plot_congestion.bzl", "plot_congestion") | ||
|
|
||
| # Format densities, rounding to 2 decimal places. | ||
| SWEEPS = { | ||
| "PLACE_DENSITY": [str(0.82 + x * 0.01 + 0.005)[:4] for x in range(10)], | ||
| } | ||
|
|
||
| SWEEP = "PLACE_DENSITY" | ||
|
|
||
| filegroup( | ||
| name = "mock-array-constraints", | ||
| srcs = [ | ||
| "constraints.sdc", | ||
| ], | ||
| visibility = [":__subpackages__"], | ||
| ) | ||
|
|
||
| filegroup( | ||
| name = "mock-array-io", | ||
| srcs = [ | ||
| "io.tcl", | ||
| ], | ||
| data = [ | ||
| "//designs/src/mock-array:util.tcl", | ||
| ], | ||
| visibility = [":__subpackages__"], | ||
| ) | ||
|
|
||
| orfs_flow( | ||
| name = "MockArray", | ||
| arguments = { | ||
| "PLACE_PINS_ARGS": "-annealing", | ||
| "IO_CONSTRAINTS": "$(location :mock-array-io)", | ||
| "PLACE_DENSITY": "0.30", | ||
| "DIE_AREA": "0 0 358.56 388.8", | ||
| "CORE_AREA": "2.16 2.16 356.40000000000003 386.64000000000004", | ||
| "MACRO_PLACE_HALO": "0 2.16", | ||
| "RTLMP_BOUNDARY_WT": "0", | ||
| "PDN_TCL": "$(PLATFORM_DIR)/openRoad/pdn/BLOCKS_grid_strategy.tcl", | ||
| "MACRO_HALO_X": "0.5", | ||
| "MACRO_HALO_Y": "0.5", | ||
| "MACRO_BLOCKAGE_HALO": "0", | ||
| "SDC_FILE": "$(location :mock-array-constraints)", | ||
| "MAX_ROUTING_LAYER": "M9", | ||
| "GDS_ALLOW_EMPTY": "Element", | ||
| "PWR_NETS_VOLTAGEsS": "", | ||
| "GND_NETS_VOLTAGES": "", | ||
| }, | ||
| macros = ["Element_generate_abstract"], | ||
| stage_sources = { | ||
| "synth": [":mock-array-constraints"] + [":mock-array-io"], | ||
| "floorplan": [":mock-array-io"], | ||
| "place": [":mock-array-io"], | ||
| }, | ||
| verilog_files = ["//designs/src/mock-array:verilog"], | ||
| ) | ||
|
|
||
| filegroup( | ||
| name = "mock-array-element-io", | ||
| srcs = [ | ||
| "Element/io.tcl", | ||
| ], | ||
| data = [ | ||
| "//designs/src/mock-array:util.tcl", | ||
| ], | ||
| visibility = [":__subpackages__"], | ||
| ) | ||
|
|
||
| mock_array_all_sources = ["//designs/src/mock-array:util.tcl"] | ||
|
|
||
| orfs_sweep( | ||
| name = "Element", | ||
| abstract_stage = "route", | ||
| arguments = { | ||
| "PLACE_DENSITY": "0.82", | ||
| "MOCK_ARRAY_ROWS": "8", | ||
| "MOCK_ARRAY_COLS": "8", | ||
| "DETAILED_ROUTE_END_ITERATION": "6", | ||
| "MIN_ROUTING_LAYER": "M2", | ||
| "MAX_ROUTING_LAYER": "M5", | ||
| "IO_PLACER_H": "M2 M4", | ||
| "IO_PLACER_V": "M3 M5", | ||
| "PLACE_PINS_ARGS": "-annealing", | ||
| "GND_NETS_VOLTAGES": "", | ||
| "PWR_NETS_VOLTAGES": "", | ||
| "SDC_FILE": "$(location :mock-array-constraints)", | ||
| "IO_CONSTRAINTS": "$(location :mock-array-element-io)", | ||
| "DIE_AREA": "0 0 43.2 43.2", | ||
| "CORE_AREA": "1.08 1.08 42.120000000000005 42.120000000000005", | ||
| "PDN_TCL": "$(PLATFORM_DIR)/openRoad/pdn/BLOCK_grid_strategy.tcl", | ||
| }, | ||
| other_variants = {"base": {}}, | ||
| stage_sources = { | ||
| "synth": mock_array_all_sources + [":mock-array-constraints"], | ||
| "floorplan": mock_array_all_sources + [":mock-array-element-io"], | ||
| "place": mock_array_all_sources + [":mock-array-element-io"], | ||
| "cts": mock_array_all_sources, | ||
| "route": mock_array_all_sources, | ||
| "final": mock_array_all_sources, | ||
| }, | ||
| sweep = { | ||
| value: { | ||
| "arguments": { | ||
| SWEEP: value, | ||
| }, | ||
| "previous_stage": { | ||
| "floorplan": "Element_synth", | ||
| }, | ||
| } | ||
| for value in SWEEPS[SWEEP] | ||
| }, | ||
| verilog_files = ["//designs/src/mock-array:verilog"], | ||
| ) | ||
|
|
||
| plot_congestion( | ||
| name = "plot", | ||
| srcs = [":Element_{value}_grt".format(value = value) for value in SWEEPS[SWEEP]], | ||
| argument = SWEEP, | ||
| values = SWEEPS[SWEEP], | ||
| ) |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,7 @@ | ||
| exports_files(["util.tcl"] + glob(["*.v"])) | ||
|
|
||
| filegroup( | ||
| name = "verilog", | ||
| srcs = glob(["*.v"]), | ||
| visibility = ["//visibility:public"], | ||
| ) |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,18 @@ | ||
| load("@orfs-pip//:requirements.bzl", "requirement") | ||
| load("@rules_python//python:pip.bzl", "compile_pip_requirements") | ||
|
|
||
| exports_files(["open_plots.sh"]) | ||
|
|
||
| py_binary( | ||
| name = "plot_congestion", | ||
| srcs = ["plot_congestion.py"], | ||
| main = "plot_congestion.py", | ||
| visibility = ["//visibility:public"], | ||
| deps = [requirement("matplotlib")], | ||
| ) | ||
|
|
||
| compile_pip_requirements( | ||
| name = "requirements", | ||
| src = "requirements.in", | ||
| requirements_txt = "requirements_lock.txt", | ||
| ) |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,2 @@ | ||
| #!/bin/bash | ||
| xdg-open $1 |
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This seems trivial - do we need a script for this?
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As far as I could find out, yes.