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2 changes: 1 addition & 1 deletion flow/designs/ihp-sg13g2/aes/rules-base.json
Original file line number Diff line number Diff line change
Expand Up @@ -140,4 +140,4 @@
"value": 1054989,
"compare": "<="
}
}
}
2 changes: 1 addition & 1 deletion flow/designs/ihp-sg13g2/gcd/constraint.sdc
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ current_design gcd

set clk_name core_clock
set clk_port_name clk
set clk_period 2.6
set clk_period 2.8
set clk_io_pct 0.2

set clk_port [get_ports $clk_port_name]
Expand Down
12 changes: 6 additions & 6 deletions flow/designs/ihp-sg13g2/gcd/rules-base.json
Original file line number Diff line number Diff line change
Expand Up @@ -30,19 +30,19 @@
"level": "warning"
},
"synth__design__instance__area__stdcell": {
"value": 5458.22361,
"value": 6828.9632,
"compare": "<="
},
"constraints__clocks__count": {
"value": 1,
"compare": "=="
},
"placeopt__design__instance__area": {
"value": 6195,
"value": 7382,
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
"value": 494,
"value": 614,
"compare": "<="
},
"detailedplace__design__violations": {
Expand Down Expand Up @@ -94,7 +94,7 @@
"compare": ">="
},
"detailedroute__route__wirelength": {
"value": 12621,
"value": 15132,
"compare": "<="
},
"detailedroute__route__drc_errors": {
Expand Down Expand Up @@ -142,7 +142,7 @@
"compare": ">="
},
"finish__design__instance__area": {
"value": 26057,
"value": 7693,
"compare": "<="
}
}
}
14 changes: 7 additions & 7 deletions flow/designs/ihp-sg13g2/i2c-gpio-expander/I2cDeviceCtrl/pdn.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -25,14 +25,14 @@ global_connect
set_voltage_domain -name {CORE} -power {VDD} -ground {VSS}

# stdcell grid
define_pdn_grid -name {grid} -voltage_domains {CORE}
define_pdn_grid -name {grid} -voltage_domains {CORE} -pins {Metal4 Metal5}
add_pdn_stripe -grid {grid} -layer {Metal1} -width {0.44} -pitch {7.56} -offset {0} \
-followpins -extend_to_core_ring
add_pdn_ring -grid {grid} -layers {Metal3 Metal4} -widths {3.0} -spacings {2.0} \
-followpins
add_pdn_ring -grid {grid} -layers {Metal4 Metal5} -widths {3.0} -spacings {2.0} \
-core_offsets {4.5} -connect_to_pads
add_pdn_stripe -grid {grid} -layer {Metal3} -width {1.840} -pitch {75.6} -offset {37.8} \
add_pdn_stripe -grid {grid} -layer {Metal4} -width {1.840} -pitch {75.6} -offset {13.6} \
-extend_to_core_ring
add_pdn_stripe -grid {grid} -layer {Metal4} -width {1.840} -pitch {75.6} -offset {37.8} \
add_pdn_stripe -grid {grid} -layer {Metal5} -width {1.840} -pitch {75.6} -offset {13.6} \
-extend_to_core_ring
add_pdn_connect -grid {grid} -layers {Metal1 Metal3}
add_pdn_connect -grid {grid} -layers {Metal3 Metal4}
add_pdn_connect -grid {grid} -layers {Metal1 Metal4}
add_pdn_connect -grid {grid} -layers {Metal4 Metal5}
4 changes: 2 additions & 2 deletions flow/designs/ihp-sg13g2/i2c-gpio-expander/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -8,14 +8,14 @@ export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc

export SEAL_GDS = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/sealring.gds.gz

export DIE_AREA = 0.0 0.0 1050.0 1050.0
export DIE_AREA = 0.0 0.0 1050.24 1050.84
export CORE_AREA = 351.36 351.54 699.84 699.3

export MAX_ROUTING_LAYER = TopMetal2

export TNS_END_PERCENT = 100
export PLACE_DENSITY = 0.75

export MACRO_PLACE_HALO = 20 20
export CORNERS = slow fast

export FOOTPRINT_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/pad.tcl
Expand Down
15 changes: 9 additions & 6 deletions flow/designs/ihp-sg13g2/i2c-gpio-expander/constraint.sdc
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,9 @@ create_clock [get_pins sg13g2_IOPad_io_clock/p2c] -name clk_core -period 20.0 -w
set_clock_uncertainty 0.15 [get_clocks clk_core]
set_clock_transition 0.25 [get_clocks clk_core]

set input_delay_value_clk_core 4.0
set output_delay_value_clk_core 4.0

set clock_ports [get_ports {
io_clock_PAD
}]
Expand All @@ -26,16 +29,16 @@ set clk_core_inout_16mA_ports [get_ports {
io_gpio_7_PAD
}]
set_driving_cell -lib_cell sg13g2_IOPadInOut16mA -pin pad $clk_core_inout_16mA_ports
set_input_delay 8 -clock clk_core $clk_core_inout_16mA_ports
set_output_delay 8 -clock clk_core $clk_core_inout_16mA_ports
set_input_delay $input_delay_value_clk_core -clock clk_core $clk_core_inout_16mA_ports
set_output_delay $output_delay_value_clk_core -clock clk_core $clk_core_inout_16mA_ports

set clk_core_inout_4mA_ports [get_ports {
io_i2c_scl_PAD
io_i2c_sda_PAD
}]
set_driving_cell -lib_cell sg13g2_IOPadInOut4mA -pin pad $clk_core_inout_4mA_ports
set_input_delay 8 -clock clk_core $clk_core_inout_4mA_ports
set_output_delay 8 -clock clk_core $clk_core_inout_4mA_ports
set_input_delay $input_delay_value_clk_core -clock clk_core $clk_core_inout_4mA_ports
set_output_delay $output_delay_value_clk_core -clock clk_core $clk_core_inout_4mA_ports

set clk_core_input_ports [get_ports {
io_reset_PAD
Expand All @@ -44,13 +47,13 @@ set clk_core_input_ports [get_ports {
io_address_2_PAD
}]
set_driving_cell -lib_cell sg13g2_IOPadIn -pin pad $clk_core_input_ports
set_input_delay 8 -clock clk_core $clk_core_input_ports
set_input_delay $input_delay_value_clk_core -clock clk_core $clk_core_input_ports

set clk_core_output_4mA_ports [get_ports {
io_i2c_interrupt_PAD
}]
set_driving_cell -lib_cell sg13g2_IOPadOut4mA -pin pad $clk_core_output_4mA_ports
set_output_delay 8 -clock clk_core $clk_core_output_4mA_ports
set_output_delay $output_delay_value_clk_core -clock clk_core $clk_core_output_4mA_ports

set_load -pin_load 5 [all_inputs]
set_load -pin_load 5 [all_outputs]
14 changes: 6 additions & 8 deletions flow/designs/ihp-sg13g2/i2c-gpio-expander/pdn.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -25,22 +25,20 @@ global_connect
set_voltage_domain -name {CORE} -power {VDD} -ground {VSS}

# stdcell grid
define_pdn_grid -name {grid} -voltage_domains {CORE}
define_pdn_grid -name {grid} -voltage_domains {CORE} -pins {TopMetal1 TopMetal2}
add_pdn_stripe -grid {grid} -layer {Metal1} -width {0.44} -pitch {7.56} -offset {0} \
-followpins -extend_to_core_ring
add_pdn_ring -grid {grid} -layers {Metal5 TopMetal1} -widths {8.0} -spacings {5.0} \
add_pdn_ring -grid {grid} -layers {TopMetal1 TopMetal2} -widths {8.0} -spacings {5.0} \
-core_offsets {4.5} -connect_to_pads
add_pdn_stripe -grid {grid} -layer {Metal5} -width {2.200} -pitch {75.6} -offset {37.8} \
add_pdn_stripe -grid {grid} -layer {TopMetal1} -width {2.200} -pitch {75.6} -offset {13.6} \
-extend_to_core_ring
add_pdn_stripe -grid {grid} -layer {TopMetal1} -width {2.200} -pitch {75.6} -offset {37.8} \
add_pdn_stripe -grid {grid} -layer {TopMetal2} -width {2.200} -pitch {75.6} -offset {13.6} \
-extend_to_core_ring
add_pdn_connect -grid {grid} -layers {Metal1 Metal5}
add_pdn_connect -grid {grid} -layers {Metal5 TopMetal1}
add_pdn_connect -grid {grid} -layers {Metal5 TopMetal2}
add_pdn_connect -grid {grid} -layers {Metal1 TopMetal1}
add_pdn_connect -grid {grid} -layers {TopMetal1 TopMetal2}

define_pdn_grid \
-name {CORE_macro_grid_1} -voltage_domains {CORE} \
-macro -cells {I2cDeviceCtrl} -grid_over_boundary
add_pdn_connect -grid {CORE_macro_grid_1} -layers {Metal3 TopMetal1}
add_pdn_connect -grid {CORE_macro_grid_1} -layers {Metal4 TopMetal1}
add_pdn_connect -grid {CORE_macro_grid_1} -layers {Metal5 TopMetal1}
8 changes: 4 additions & 4 deletions flow/designs/ihp-sg13g2/i2c-gpio-expander/rules-base.json
Original file line number Diff line number Diff line change
Expand Up @@ -97,19 +97,19 @@
"compare": "<="
},
"placeopt__design__instance__count__stdcell": {
"value": 965,
"value": 953,
"compare": "<="
},
"detailedplace__design__violations": {
"value": 0,
"compare": "=="
},
"cts__design__instance__count__setup_buffer": {
"value": 84,
"value": 83,
"compare": "<="
},
"cts__design__instance__count__hold_buffer": {
"value": 84,
"value": 83,
"compare": "<="
},
"cts__timing__setup__ws": {
Expand Down Expand Up @@ -197,7 +197,7 @@
"compare": ">="
},
"finish__design__instance__area": {
"value": 135675,
"value": 42034,
"compare": "<="
}
}
4 changes: 2 additions & 2 deletions flow/designs/ihp-sg13g2/ibex/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.
# Adders degrade ibex setup repair
export ADDER_MAP_FILE :=

export CORE_UTILIZATION = 45
export CORE_UTILIZATION = 35
export PLACE_DENSITY_LB_ADDON = 0.2
export TNS_END_PERCENT = 100
export CTS_BUF_DISTANCE = 60
export CTS_BUF_DISTANCE = 60
29 changes: 2 additions & 27 deletions flow/designs/ihp-sg13g2/ibex/rules-base.json
Original file line number Diff line number Diff line change
@@ -1,29 +1,4 @@
{
"detailedroute__flow__warnings__count:DRT-0349": {
"value": 10,
"compare": "<=",
"level": "warning"
},
"finish__flow__warnings__count:GUI-0076": {
"value": 1,
"compare": "<=",
"level": "warning"
},
"floorplan__flow__warnings__count:EST-0027": {
"value": 1,
"compare": "<=",
"level": "warning"
},
"floorplan__flow__warnings__count:IFP-0028": {
"value": 1,
"compare": "<=",
"level": "warning"
},
"globalroute__flow__warnings__count:DRT-0349": {
"value": 10,
"compare": "<=",
"level": "warning"
},
"synth__design__instance__area__stdcell": {
"value": 305820.24,
"compare": "<="
Expand Down Expand Up @@ -89,7 +64,7 @@
"compare": ">="
},
"detailedroute__route__wirelength": {
"value": 999955,
"value": 989089,
"compare": "<="
},
"detailedroute__route__drc_errors": {
Expand Down Expand Up @@ -137,7 +112,7 @@
"compare": ">="
},
"finish__design__instance__area": {
"value": 645302,
"value": 314511,
"compare": "<="
}
}
28 changes: 4 additions & 24 deletions flow/designs/ihp-sg13g2/jpeg/rules-base.json
Original file line number Diff line number Diff line change
@@ -1,24 +1,4 @@
{
"detailedroute__flow__warnings__count:DRT-0349": {
"value": 10,
"compare": "<=",
"level": "warning"
},
"finish__flow__warnings__count:GUI-0076": {
"value": 1,
"compare": "<=",
"level": "warning"
},
"floorplan__flow__warnings__count:IFP-0028": {
"value": 1,
"compare": "<=",
"level": "warning"
},
"globalroute__flow__warnings__count:DRT-0349": {
"value": 10,
"compare": "<=",
"level": "warning"
},
"synth__design__instance__area__stdcell": {
"value": 1499147.11,
"compare": "<="
Expand Down Expand Up @@ -48,7 +28,7 @@
"compare": "<="
},
"cts__timing__setup__ws": {
"value": -0.4,
"value": 0.0,
"compare": ">="
},
"cts__timing__setup__tns": {
Expand All @@ -68,7 +48,7 @@
"compare": "<="
},
"globalroute__timing__setup__ws": {
"value": -0.4,
"value": -0.0182,
"compare": ">="
},
"globalroute__timing__setup__tns": {
Expand Down Expand Up @@ -96,7 +76,7 @@
"compare": "<="
},
"detailedroute__antenna_diodes_count": {
"value": 166,
"value": 132,
"compare": "<="
},
"detailedroute__timing__setup__ws": {
Expand Down Expand Up @@ -132,7 +112,7 @@
"compare": ">="
},
"finish__design__instance__area": {
"value": 3104666,
"value": 1059270,
"compare": "<="
}
}
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