Merge pull request #7845 from The-OpenROAD-Project-staging/secure-jhkim-test

rsz: added -buffer_cell & -verbose arguments for buffer_ports command

Author: maliberty

.gitignore

@@ -11,6 +11,7 @@
 *.orig
 *.vscode
 *.sw[opqr]
+*.code-workspace
 TAGS
 *~
 \#*#

src/rsz/README.md

@@ -208,14 +208,15 @@ The `buffer_ports -inputs` command adds a buffer between the input and its
 loads.  The `buffer_ports -outputs` adds a buffer between the port driver
 and the output port. Inserting buffers on input and output ports makes
 the block input capacitances and output drives independent of the block
-internals.
+internals. It uses the buffer library cell defined by `-buffer_cell` if it is given. 
 
 ```tcl
 buffer_ports 
     [-inputs] 
     [-outputs] 
     [-max_utilization util]
     [-buffer_cell buf_cell]
+    [-verbose]
 ```
 
 #### Options
@@ -224,6 +225,8 @@ buffer_ports
 | ----- | ----- |
 | `-inputs`, `-outputs` | Insert a buffer between the input and load, output and load respectively. The default behavior is `-inputs` and `-outputs` set if neither is specified. |
 | `-max_utilization` | Defines the percentage of core area used. |
+| `-buffer_cell`     | Specifies the buffer cell type to be used. |
+| `-verbose`         | Enable verbose logging. |
 
 #### Instance Name Prefixes
 

src/rsz/include/rsz/Resizer.hh

@@ -259,8 +259,8 @@ class Resizer : public dbStaState, public dbNetworkObserver
   // Remove all or selected buffers from the netlist.
   void removeBuffers(InstanceSeq insts);
   void unbufferNet(Net* net);
-  void bufferInputs();
-  void bufferOutputs();
+  void bufferInputs(LibertyCell* buffer_cell = nullptr, bool verbose = false);
+  void bufferOutputs(LibertyCell* buffer_cell = nullptr, bool verbose = false);
 
   // from sta::dbNetworkObserver callbacks
   void postReadLiberty() override;
@@ -446,8 +446,10 @@ class Resizer : public dbStaState, public dbNetworkObserver
   double computeDesignArea();
   void initDesignArea();
   void ensureLevelDrvrVertices();
-  Instance* bufferInput(const Pin* top_pin, LibertyCell* buffer_cell);
-  void bufferOutput(const Pin* top_pin, LibertyCell* buffer_cell);
+  Instance* bufferInput(const Pin* top_pin,
+                        LibertyCell* buffer_cell,
+                        bool verbose);
+  void bufferOutput(const Pin* top_pin, LibertyCell* buffer_cell, bool verbose);
   bool hasTristateOrDontTouchDriver(const Net* net);
   bool isTristateDriver(const Pin* pin);
   void checkLibertyForAllCorners();
@@ -457,6 +459,7 @@ class Resizer : public dbStaState, public dbNetworkObserver
                             float max_drive_resist);
   void findBuffers();
   void findFastBuffers();
+  LibertyCell* selectBufferCell(LibertyCell* buffer_cell = nullptr);
   bool isLinkCell(LibertyCell* cell) const;
   void findTargetLoads();
   void balanceBin(const std::vector<odb::dbInst*>& bin,

src/rsz/src/Resizer.cc

@@ -746,17 +746,44 @@ void Resizer::findBuffers()
   }
 }
 
+LibertyCell* Resizer::selectBufferCell(LibertyCell* user_buffer_cell)
+{
+  // Prefer user-specified buffer cell if provided.
+  if (user_buffer_cell) {
+    return user_buffer_cell;
+  }
+
+  // Otherwise, find the weakest buffer with the lowest drive resistance.
+  findBuffers();  // updates buffer_lowest_drive_
+
+  // No buffer?
+  if (buffer_lowest_drive_ == nullptr) {
+    logger_->error(RSZ, 23, "No buffers found.");
+  }
+
+  return buffer_lowest_drive_;
+}
+
 bool Resizer::isLinkCell(LibertyCell* cell) const
 {
   return network_->findLibertyCell(cell->name()) == cell;
 }
 
 ////////////////////////////////////////////////////////////////
 
-void Resizer::bufferInputs()
+void Resizer::bufferInputs(LibertyCell* buffer_cell, bool verbose)
 {
   init();
-  findBuffers();
+
+  // Use buffer_cell. If it is null, find the buffer w/ lowest drive resistance.
+  LibertyCell* selected_buffer_cell = selectBufferCell(buffer_cell);
+  if (verbose) {
+    logger_->info(RSZ,
+                  29,
+                  "Start input port buffering with {}.",
+                  selected_buffer_cell->name());
+  }
+
   sta_->ensureClkNetwork();
   inserted_buffer_count_ = 0;
   buffer_moved_into_core_ = false;
@@ -776,14 +803,18 @@ void Resizer::bufferInputs()
           // Hands off special nets.
           && !db_network_->isSpecial(net) && hasPins(net)) {
         // repair_design will resize to target slew.
-        bufferInput(pin, buffer_lowest_drive_);
+        bufferInput(pin, selected_buffer_cell, verbose);
       }
     }
   }
 
+  logger_->info(RSZ,
+                27,
+                "Inserted {} {} input buffers.",
+                inserted_buffer_count_,
+                selected_buffer_cell->name());
+
   if (inserted_buffer_count_ > 0) {
-    logger_->info(
-        RSZ, 27, "Inserted {} input buffers.", inserted_buffer_count_);
     level_drvr_vertices_valid_ = false;
   }
 }
@@ -852,7 +883,9 @@ void Resizer::SwapNetNames(odb::dbITerm* iterm_to, odb::dbITerm* iterm_from)
 Make sure all the top pins are buffered
 */
 
-Instance* Resizer::bufferInput(const Pin* top_pin, LibertyCell* buffer_cell)
+Instance* Resizer::bufferInput(const Pin* top_pin,
+                               LibertyCell* buffer_cell,
+                               bool verbose)
 {
   dbNet* top_pin_flat_net = db_network_->flatNet(top_pin);
   odb::dbModNet* top_pin_hier_net = db_network_->hierNet(top_pin);
@@ -897,9 +930,20 @@ Instance* Resizer::bufferInput(const Pin* top_pin, LibertyCell* buffer_cell)
   delete pin_iter;
   // dont buffer, buffers
   if (has_dont_touch || !has_non_buffer) {
+    if (verbose) {
+      logger_->info(RSZ,
+                    213,
+                    "Skipping input port {} buffering.",
+                    network_->name(top_pin));
+    }
     return nullptr;
   }
 
+  if (verbose) {
+    logger_->info(
+        RSZ, 214, "Buffering input port {}.", network_->name(top_pin));
+  }
+
   // make the buffer and its output net.
   string buffer_name = makeUniqueInstName("input");
   Instance* parent = db_network_->topInstance();
@@ -972,10 +1016,19 @@ Instance* Resizer::bufferInput(const Pin* top_pin, LibertyCell* buffer_cell)
   return buffer;
 }
 
-void Resizer::bufferOutputs()
+void Resizer::bufferOutputs(LibertyCell* buffer_cell, bool verbose)
 {
   init();
-  findBuffers();
+
+  // Use buffer_cell. If it is null, find the buffer w/ lowest drive resistance.
+  LibertyCell* selected_buffer_cell = selectBufferCell(buffer_cell);
+  if (verbose) {
+    logger_->info(RSZ,
+                  31,
+                  "Start output port buffering with {}.",
+                  selected_buffer_cell->name());
+  }
+
   inserted_buffer_count_ = 0;
   buffer_moved_into_core_ = false;
 
@@ -995,14 +1048,18 @@ void Resizer::bufferOutputs()
           // drivers.
           && !hasTristateOrDontTouchDriver(net) && !vertex->isConstant()
           && hasPins(net)) {
-        bufferOutput(pin, buffer_lowest_drive_);
+        bufferOutput(pin, selected_buffer_cell, verbose);
       }
     }
   }
 
+  logger_->info(RSZ,
+                28,
+                "Inserted {} {} output buffers.",
+                inserted_buffer_count_,
+                selected_buffer_cell->name());
+
   if (inserted_buffer_count_ > 0) {
-    logger_->info(
-        RSZ, 28, "Inserted {} output buffers.", inserted_buffer_count_);
     level_drvr_vertices_valid_ = false;
   }
 }
@@ -1039,8 +1096,15 @@ bool Resizer::isTristateDriver(const Pin* pin)
   return port && port->direction()->isAnyTristate();
 }
 
-void Resizer::bufferOutput(const Pin* top_pin, LibertyCell* buffer_cell)
+void Resizer::bufferOutput(const Pin* top_pin,
+                           LibertyCell* buffer_cell,
+                           bool verbose)
 {
+  if (verbose) {
+    logger_->info(
+        RSZ, 215, "Buffering output port {}.", network_->name(top_pin));
+  }
+
   NetworkEdit* network = networkEdit();
 
   odb::dbITerm* top_pin_op_iterm;
@@ -1056,6 +1120,7 @@ void Resizer::bufferOutput(const Pin* top_pin, LibertyCell* buffer_cell)
   sta_->disconnectPin(const_cast<Pin*>(top_pin));
 
   LibertyPort *input, *output;
+  assert(buffer_cell);
   buffer_cell->bufferPorts(input, output);
 
   string buffer_name = makeUniqueInstName("output");

src/rsz/src/Resizer.i

@@ -1,6 +1,8 @@
 // SPDX-License-Identifier: BSD-3-Clause
 // Copyright (c) 2019-2025, The OpenROAD Authors
 
+// clang-format off
+
 %{
 
 #include <cstdint>
@@ -409,19 +411,19 @@ set_dont_touch_net(Net *net,
 }
 
 void
-buffer_inputs()
+buffer_inputs(LibertyCell *buffer_cell, bool verbose)
 {
   ensureLinked();
   Resizer *resizer = getResizer();
-  resizer->bufferInputs();
+  resizer->bufferInputs(buffer_cell, verbose);
 }
 
 void
-buffer_outputs()
+buffer_outputs(LibertyCell *buffer_cell, bool verbose)
 {
   ensureLinked();
   Resizer *resizer = getResizer();
-  resizer->bufferOutputs();
+  resizer->bufferOutputs(buffer_cell, verbose);
 }
 
 void

src/rsz/src/Resizer.tcl

@@ -9,8 +9,29 @@ proc get_db_tech_checked { } {
   }
   return $tech
 }
+
+proc parse_buffer_cell { keys_var } {
+  upvar 1 $keys_var keys
+  set buffer_cell "NULL"
+
+  if { [info exists keys(-buffer_cell)] } {
+    set buffer_cell_name $keys(-buffer_cell)
+    if { $buffer_cell_name ne "" } {
+      set buffer_cell [sta::get_lib_cell_error "-buffer_cell" $buffer_cell_name]
+
+      # the lib cell is a buffer?
+      if { $buffer_cell ne "NULL" && ![get_property $buffer_cell is_buffer] } {
+        utl::error RSZ 211 "[get_name $buffer_cell] is not a buffer."
+      }
+    }
+  }
+  return $buffer_cell
 }
 
+# namespace eval rsz
+}
+
+
 # Units are from OpenSTA (ie Liberty file or set_cmd_units).
 sta::define_cmd_args "set_layer_rc" { [-layer layer]\
                                         [-via via_layer]\
@@ -441,28 +462,34 @@ proc report_dont_touch { args } {
 }
 
 sta::define_cmd_args "buffer_ports" {[-inputs] [-outputs]\
-                                       [-max_utilization util]\
-                                       [-buffer_cell buf_cell]}
+                                     [-max_utilization util]\
+                                     [-buffer_cell buf_cell]\
+                                     [-verbose]}
 
 proc buffer_ports { args } {
   sta::parse_key_args "buffer_ports" args \
     keys {-buffer_cell -max_utilization} \
-    flags {-inputs -outputs}
+    flags {-inputs -outputs -verbose}
 
   set buffer_inputs [info exists flags(-inputs)]
   set buffer_outputs [info exists flags(-outputs)]
   if { !$buffer_inputs && !$buffer_outputs } {
     set buffer_inputs 1
     set buffer_outputs 1
   }
+
+  set verbose [info exists flags(-verbose)]
+
   sta::check_argc_eq0 "buffer_ports" $args
 
   rsz::set_max_utilization [rsz::parse_max_util keys]
+  set buffer_cell [rsz::parse_buffer_cell keys]
+
   if { $buffer_inputs } {
-    rsz::buffer_inputs
+    rsz::buffer_inputs $buffer_cell $verbose
   }
   if { $buffer_outputs } {
-    rsz::buffer_outputs
+    rsz::buffer_outputs $buffer_cell $verbose
   }
 }
 
@@ -1056,7 +1083,7 @@ proc replace_arith_modules { args } {
   if { [info exists keys(-target)] } {
     set target $keys(-target)
     if { [lsearch -exact {setup hold power area} $target] == -1 } {
-      util::error "RSZ" 164 "-target needs to be one of setup, hold, power, area"
+      utl::error "RSZ" 164 "-target needs to be one of setup, hold, power, area"
     }
   } else {
     set target "setup"

src/rsz/test/CMakeLists.txt

@@ -12,6 +12,8 @@ or_integration_tests(
     buffer_ports6
     buffer_ports7
     buffer_ports8
+    buffer_ports9
+    buffer_ports10
     buffer_varying_lengths
     clone_flat
     clone_hier

src/rsz/test/buffer_ports1.ok

@@ -4,6 +4,6 @@
 [INFO ODB-0131]     Created 5 components and 27 component-terminals.
 [INFO ODB-0132]     Created 2 special nets and 10 connections.
 [INFO ODB-0133]     Created 12 nets and 14 connections.
-[INFO RSZ-0027] Inserted 2 input buffers.
-[INFO RSZ-0028] Inserted 1 output buffers.
+[INFO RSZ-0027] Inserted 2 BUF_X1 input buffers.
+[INFO RSZ-0028] Inserted 1 BUF_X1 output buffers.
 No differences found.