Merge pull request #7999 from jfgava/cts-ndr-strategies

cts: multiple strategies to apply NDR to clock nets

Author: maliberty

src/cts/README.md

@@ -61,7 +61,7 @@ clock_tree_synthesis
     [-num_static_layers]
     [-sink_clustering_buffer]
     [-obstruction_aware]
-    [-apply_ndr]
+    [-apply_ndr strategy]
     [-insertion_delay]
     [-dont_use_dummy_load]
     [-sink_buffer_max_cap_derate derate_value]
@@ -92,7 +92,7 @@ clock_tree_synthesis
 | `-num_static_layers` | Set the number of static layers. The default value is `0`, and the allowed values are integers `[0, MAX_INT]`. |
 | `-sink_clustering_buffer` | Set the sink clustering buffer(s) to be used. |
 | `-obstruction_aware` | Enables obstruction-aware buffering such that clock buffers are not placed on top of blockages or hard macros. This option may reduce legalizer displacement, leading to better latency, skew or timing QoR.  The default value is `False`, and the allowed values are bool. |
-| `-apply_ndr` | Applies 2X spacing non-default rule to all clock nets except leaf-level nets. The default value is `False`. |
+| `-apply_ndr` | Applies 2X spacing non-default rule to clock nets except leaf-level nets following some strategy. There are four strategy options: `none, root_only, half, full`. If this is not specified, the default value is `none`. |
 | `-dont_use_dummy_load` | Don't apply dummy buffer or inverter cells at clock tree leaves to balance loads. The default values is `False`. |
 | `-sink_buffer_max_cap_derate` | Use this option to control automatic buffer selection. To favor strong(weak) drive strength buffers use a small(large) value.  The default value is `0.01`, meaning that buffers are selected by derating max cap limit by 0.01. The value of 1.0 means no derating of max cap limit.  |
 | `-delay_buffer_derate` | This option balances latencies between macro cells and registers by inserting delay buffers.  The default value is `1.0`, meaning all needed delay buffers are inserted.  A value of 0.5 means only half of necessary delay buffers are inserted.  A value of 0.0 means no insertion of delay buffers. |

src/cts/include/cts/TritonCTS.h

@@ -98,12 +98,25 @@ class TritonCTS
   void buildClockTrees();
   void writeDataToDb();
 
+  // NDR functions
+  std::vector<int> getAllClockTreeLevels(Clock& clockNet);
+  int applyNDRToClockLevels(Clock& clockNet,
+                            odb::dbTechNonDefaultRule* clockNDR,
+                            const std::vector<int>& targetLevels);
+
+  int applyNDRToClockLevelRange(Clock& clockNet,
+                                odb::dbTechNonDefaultRule* clockNDR,
+                                int minLevel,
+                                int maxLevel);
+  int applyNDRToFirstHalfLevels(Clock& clockNet,
+                                odb::dbTechNonDefaultRule* clockNDR);
+
   // db functions
   bool masterExists(const std::string& master) const;
   void populateTritonCTS();
   void writeClockNetsToDb(TreeBuilder* builder,
                           std::set<odb::dbNet*>& clkLeafNets);
-  void writeClockNDRsToDb(const std::set<odb::dbNet*>& clkLeafNets);
+  void writeClockNDRsToDb(TreeBuilder* builder);
   void incrementNumClocks() { ++numberOfClocks_; }
   void clearNumClocks() { numberOfClocks_ = 0; }
   unsigned getNumClocks() const { return numberOfClocks_; }

src/cts/src/Clock.h

@@ -94,10 +94,16 @@ class ClockSubNet
   std::deque<ClockInst*> instances_;
   std::unordered_map<ClockInst*, unsigned> mapInstToIdx_;
   bool leafLevel_ = false;
+  int level_ = -1;
+  odb::dbNet* netObj_ = nullptr;
 
  public:
   explicit ClockSubNet(const std::string& name) : name_(name) {}
 
+  void setNetObj(odb::dbNet* net) { netObj_ = net; }
+  odb::dbNet* getNetObj() { return netObj_; }
+  void setTreeLevel(int level) { level_ = level; }
+  int getTreeLevel() { return level_; }
   void setLeafLevel(bool isLeaf) { leafLevel_ = isLeaf; }
   bool isLeafLevel() const { return leafLevel_; }
 

src/cts/src/CtsOptions.h

@@ -27,6 +27,14 @@ namespace cts {
 class CtsOptions : public odb::dbBlockCallBackObj
 {
  public:
+  enum class NdrStrategy
+  {
+    NONE,
+    ROOT_ONLY,
+    HALF,
+    FULL
+  };
+
   enum class MasterType
   {
     DUMMY,
@@ -222,8 +230,6 @@ class CtsOptions : public odb::dbBlockCallBackObj
   stt::SteinerTreeBuilder* getSttBuilder() const { return sttBuilder_; }
   void setObstructionAware(bool obs) { obsAware_ = obs; }
   bool getObstructionAware() const { return obsAware_; }
-  void setApplyNDR(bool ndr) { applyNDR_ = ndr; }
-  bool applyNDR() const { return applyNDR_; }
   void enableInsertionDelay(bool insDelay) { insertionDelay_ = insDelay; }
   bool insertionDelayEnabled() const { return insertionDelay_; }
   void setBufferListInferred(bool inferred) { bufferListInferred_ = inferred; }
@@ -264,6 +270,10 @@ class CtsOptions : public odb::dbBlockCallBackObj
   void setRepairClockNets(bool value) { repairClockNets_ = value; }
   bool getRepairClockNets() { return repairClockNets_; }
 
+  // NDR strategies
+  void setApplyNDR(NdrStrategy strategy) { ndrStrategy_ = strategy; }
+  NdrStrategy getApplyNdr() const { return ndrStrategy_; }
+
  private:
   std::string clockNets_;
   std::string rootBuffer_;
@@ -315,7 +325,6 @@ class CtsOptions : public odb::dbBlockCallBackObj
   utl::Logger* logger_ = nullptr;
   stt::SteinerTreeBuilder* sttBuilder_ = nullptr;
   bool obsAware_ = true;
-  bool applyNDR_ = false;
   bool insertionDelay_ = true;
   bool bufferListInferred_ = false;
   bool sinkBufferInferred_ = false;
@@ -330,6 +339,7 @@ class CtsOptions : public odb::dbBlockCallBackObj
   std::string dummyload_prefix_ = "clkload";
   MasterCount dummy_count_;
   bool repairClockNets_ = false;
+  NdrStrategy ndrStrategy_ = NdrStrategy::NONE;
 };
 
 }  // namespace cts

src/cts/src/HTreeBuilder.cpp

@@ -1849,6 +1849,7 @@ void HTreeBuilder::createClockSubNets()
 
   addTreeLevelBuffer(&rootBuffer);
   ClockSubNet& rootClockSubNet = clock_.addSubNet("clknet_0");
+  rootClockSubNet.setTreeLevel(0);
   rootClockSubNet.addInst(rootBuffer);
   treeBufLevels_++;
 
@@ -1950,6 +1951,11 @@ void HTreeBuilder::createClockSubNets()
                              wireSegmentUnit_,
                              this);
 
+      // Set clock tree level the first time only.
+      if (builder.getDrivingSubNet()->getTreeLevel() < 0) {
+        builder.getDrivingSubNet()->setTreeLevel(levelIdx);
+      }
+
       if (!options_->getTreeBuffer().empty()) {
         builder.build(options_->getTreeBuffer());
       } else {
@@ -2017,6 +2023,7 @@ void HTreeBuilder::createSingleBufferClockNet()
 
   addTreeLevelBuffer(&rootBuffer);
   ClockSubNet& clockSubNet = clock_.addSubNet("clknet_0");
+  clockSubNet.setTreeLevel(0);
   clockSubNet.addInst(rootBuffer);
 
   clock_.forEachSink([&](ClockInst& inst) { clockSubNet.addInst(inst); });

src/cts/src/TritonCTS.cpp

@@ -481,8 +481,8 @@ void TritonCTS::writeDataToDb()
 
   for (auto& builder : builders_) {
     writeClockNetsToDb(builder.get(), clkLeafNets);
-    if (options_->applyNDR()) {
-      writeClockNDRsToDb(clkLeafNets);
+    if (options_->getApplyNdr() != CtsOptions::NdrStrategy::NONE) {
+      writeClockNDRsToDb(builder.get());
     }
     if (options_->dummyLoadEnabled()) {
       writeDummyLoadsToDb(builder->getClock(), clkDummies);
@@ -1438,6 +1438,7 @@ void TritonCTS::writeClockNetsToDb(TreeBuilder* builder,
     }
     odb::dbNet* clkSubNet
         = odb::dbNet::create(block_, subNet.getName().c_str());
+    subNet.setNetObj(clkSubNet);
 
     ++numClkNets_;
     clkSubNet->setSigType(odb::dbSigType::CLOCK);
@@ -1557,11 +1558,110 @@ void TritonCTS::writeClockNetsToDb(TreeBuilder* builder,
       CTS, 17, "    Max level of the clock tree: {}.", clockNet.getMaxLevel());
 }
 
-void TritonCTS::writeClockNDRsToDb(const std::set<odb::dbNet*>& clkLeafNets)
+// Utility function to get all unique clock tree levels
+std::vector<int> TritonCTS::getAllClockTreeLevels(Clock& clockNet)
+{
+  std::set<int> uniqueLevels;
+
+  clockNet.forEachSubNet([&](ClockSubNet& subNet) {
+    if (!subNet.isLeafLevel()) {
+      uniqueLevels.insert(subNet.getTreeLevel());
+    }
+  });
+
+  return std::vector<int>(uniqueLevels.begin(), uniqueLevels.end());
+}
+
+// Function to apply NDR to specific clock tree levels and return the number of
+// NDR applied nets
+int TritonCTS::applyNDRToClockLevels(Clock& clockNet,
+                                     odb::dbTechNonDefaultRule* clockNDR,
+                                     const std::vector<int>& targetLevels)
+{
+  int ndrAppliedNets = 0;
+
+  debugPrint(
+      logger_, CTS, "clustering", 1, "Applying NDR to clock tree levels: ");
+  for (int level : targetLevels) {
+    debugPrint(logger_, CTS, "clustering", 1, "{} ", level);
+  }
+
+  // Check if the main clock net (level 0) is in the level list
+  if (std::find(targetLevels.begin(), targetLevels.end(), 0)
+      != targetLevels.end()) {
+    odb::dbNet* clk_net = clockNet.getNetObj();
+    clk_net->setNonDefaultRule(clockNDR);
+    ndrAppliedNets++;
+    // clang-format off
+    debugPrint(logger_, CTS, "clustering", 1,
+        "Applied NDR to: {} (level {})", clockNet.getName(), 0);
+    // clang-format on
+  }
+
+  // Check clock sub nets list and apply NDR if level matches
+  clockNet.forEachSubNet([&](ClockSubNet& subNet) {
+    int level = subNet.getTreeLevel();
+    if (std::find(targetLevels.begin(), targetLevels.end(), level)
+        != targetLevels.end()) {
+      odb::dbNet* net = subNet.getNetObj();
+      if (!subNet.isLeafLevel()) {
+        net->setNonDefaultRule(clockNDR);
+        ndrAppliedNets++;
+        std::string net_name = net->getName();
+        // clang-format off
+        debugPrint(logger_, CTS, "clustering", 1,
+            "Applied NDR to: {} (level {})", net_name, level);
+        // clang-format on
+      }
+    }
+  });
+
+  return ndrAppliedNets;
+}
+
+// Alternative function to apply NDR to a range of clock tree levels
+int TritonCTS::applyNDRToClockLevelRange(Clock& clockNet,
+                                         odb::dbTechNonDefaultRule* clockNDR,
+                                         const int minLevel,
+                                         const int maxLevel)
+{
+  std::vector<int> targetLevels;
+  for (int i = minLevel; i <= maxLevel; i++) {
+    targetLevels.push_back(i);
+  }
+
+  return applyNDRToClockLevels(clockNet, clockNDR, targetLevels);
+}
+
+// Function to apply NDR to the first half of clock tree levels
+int TritonCTS::applyNDRToFirstHalfLevels(Clock& clockNet,
+                                         odb::dbTechNonDefaultRule* clockNDR)
+{
+  // Get all unique levels in the design
+  const std::vector<int> allLevels = getAllClockTreeLevels(clockNet);
+
+  // Calculate first half (rounding up if odd number of levels)
+  const int halfCount = (allLevels.size() + 1) / 2;
+
+  // Create vector with first half of levels
+  std::vector<int> firstHalfLevels(allLevels.begin(),
+                                   allLevels.begin() + halfCount);
+
+  // clang-format off
+  debugPrint(logger_, CTS, "clustering", 1, "Total clock tree levels found: {}"
+        " Applying NDR to first {} levels", allLevels.size(), halfCount);
+  // clang-format on
+
+  // Apply NDR to the first half
+  return applyNDRToClockLevels(clockNet, clockNDR, firstHalfLevels);
+}
+
+void TritonCTS::writeClockNDRsToDb(TreeBuilder* builder)
 {
   char ruleName[64];
   int ruleIndex = 0;
   odb::dbTechNonDefaultRule* clockNDR;
+  Clock& clockNet = builder->getClock();
 
   // create a new non-default rule in *block* not tech
   while (ruleIndex >= 0) {
@@ -1595,14 +1695,23 @@ void TritonCTS::writeClockNDRsToDb(const std::set<odb::dbNet*>& clkLeafNets)
     // clang-format on
   }
 
-  // apply NDR to all non-leaf clock nets
   int clkNets = 0;
-  for (odb::dbNet* net : block_->getNets()) {
-    if (net->getSigType() == odb::dbSigType::CLOCK
-        && (clkLeafNets.find(net) == clkLeafNets.end())) {
-      net->setNonDefaultRule(clockNDR);
-      clkNets++;
-    }
+
+  // Apply NDR following the selected strategy (root_only, half, full)
+  switch (options_->getApplyNdr()) {
+    case CtsOptions::NdrStrategy::ROOT_ONLY:
+      clkNets = applyNDRToClockLevels(clockNet, clockNDR, {0});
+      break;
+    case CtsOptions::NdrStrategy::HALF:
+      clkNets = applyNDRToFirstHalfLevels(clockNet, clockNDR);
+      break;
+    case CtsOptions::NdrStrategy::FULL:
+      clkNets = applyNDRToClockLevels(
+          clockNet, clockNDR, getAllClockTreeLevels(clockNet));
+      break;
+    case CtsOptions::NdrStrategy::NONE:
+      // Should not be called
+      break;
   }
 
   logger_->info(CTS,

src/cts/src/TritonCTS.i

@@ -26,6 +26,35 @@ using ord::getTritonCts;
 %ignore cts::CtsOptions::setObserver;
 %ignore cts::CtsOptions::getObserver;
 
+// Enum: CtsOptions::NdrStrategy
+%typemap(typecheck) CtsOptions::NdrStrategy {
+  char *str = Tcl_GetStringFromObj($input, 0);
+  if (strcasecmp(str, "NONE") == 0) {
+    $1 = 1;
+  } else if (strcasecmp(str, "ROOT_ONLY") == 0) {
+    $1 = 1;
+  } else if (strcasecmp(str, "HALF") == 0) {
+    $1 = 1;
+  } else if (strcasecmp(str, "FULL") == 0) {
+    $1 = 1;
+  } else {
+    $1 = 0;
+  }
+}
+
+%typemap(in) CtsOptions::NdrStrategy {
+  char *str = Tcl_GetStringFromObj($input, 0);
+  if (strcasecmp(str, "ROOT_ONLY") == 0) {
+    $1 = CtsOptions::NdrStrategy::ROOT_ONLY;
+  } else if (strcasecmp(str, "HALF") == 0) {
+    $1 = CtsOptions::NdrStrategy::HALF;
+  } else if (strcasecmp(str, "FULL") == 0) {
+    $1 = CtsOptions::NdrStrategy::FULL;
+  } else {
+    $1 = CtsOptions::NdrStrategy::NONE;
+  };
+}
+
 %inline %{
 
 void
@@ -205,9 +234,9 @@ set_obstruction_aware(bool obs)
 }
 
 void
-set_apply_ndr(bool ndr)
+set_apply_ndr(CtsOptions::NdrStrategy strategy)
 {
-  getTritonCts()->getParms()->setApplyNDR(ndr);
+  getTritonCts()->getParms()->setApplyNDR(strategy);
 }
 
 void

src/cts/src/TritonCTS.tcl

@@ -56,7 +56,7 @@ sta::define_cmd_args "clock_tree_synthesis" {[-wire_unit unit]
                                              [-sink_clustering_buffer] \
                                              [-obstruction_aware] \
                                              [-no_obstruction_aware] \
-                                             [-apply_ndr] \
+                                             [-apply_ndr strategy] \
                                              [-sink_buffer_max_cap_derate] \
                                              [-dont_use_dummy_load] \
                                              [-delay_buffer_derate] \
@@ -74,9 +74,10 @@ proc clock_tree_synthesis { args } {
           -clustering_unbalance_ratio -sink_clustering_max_diameter \
           -macro_clustering_size -macro_clustering_max_diameter \
           -sink_clustering_levels -tree_buf \
+          -apply_ndr \
           -sink_buffer_max_cap_derate -delay_buffer_derate -library} \
     flags {-post_cts_disable -sink_clustering_enable -balance_levels \
-           -obstruction_aware -no_obstruction_aware -apply_ndr \
+           -obstruction_aware -no_obstruction_aware \
            -dont_use_dummy_load -repair_clock_nets -no_insertion_delay
   } ;# checker off
 
@@ -213,7 +214,10 @@ proc clock_tree_synthesis { args } {
     cts::set_dummy_load true
   }
 
-  cts::set_apply_ndr [info exists flags(-apply_ndr)]
+  if { [info exists keys(-apply_ndr)] } {
+    set strategy $keys(-apply_ndr)
+    cts::set_apply_ndr $strategy
+  }
 
   if { [info exists flags(-repair_clock_nets)] } {
     cts::set_repair_clock_nets true