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Merge pull request #8519 from Pinata-Consulting/mock-array-whittling-away
Mock array whittling away
2 parents c9cc993 + afdc440 commit c2ab7c1

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7 files changed

+64
-49
lines changed

7 files changed

+64
-49
lines changed

test/orfs/mock-array/BUILD

Lines changed: 27 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -49,13 +49,14 @@ placement_grid_y = 0.048 * MOCK_ARRAY_SCALE
4949
#
5050
# pitch_x, pitch_y - placement pitch for each Element, in x and y direction
5151
# specification are in unit of placement grid
52-
rows = 8
52+
rows = 4
5353

54-
cols = 8
54+
cols = 4
5555

56-
ce_x = 20
56+
# Use smallest working value for minimum area of test-case
57+
ce_x = 8
5758

58-
ce_y = 20
59+
ce_y = 8
5960

6061
# Element size is set to multiple of placement grid above
6162
ce_width = ce_x * placement_grid_x
@@ -69,19 +70,19 @@ pitch_x = ce_width
6970
pitch_y = ce_height + (placement_grid_y * 2)
7071

7172
# top level core offset
72-
margin_x = placement_grid_x
73+
margin_x = placement_grid_x * 2
7374

74-
margin_y = placement_grid_y
75+
margin_y = placement_grid_y * 2
7576

7677
# Element core margin
7778
ce_margin_x = placement_grid_x * 0.5
7879

7980
ce_margin_y = placement_grid_y * 0.5
8081

8182
# PDN problems if it is smaller. Not investigated.
82-
array_spacing_x = margin_x * 2
83+
array_spacing_x = placement_grid_x * 4
8384

84-
array_spacing_y = margin_y * 2
85+
array_spacing_y = placement_grid_y * 4
8586

8687
# top level core and die size, we need some space around the
8788
# array to put some flip flops and buffers for top level io pins
@@ -90,7 +91,7 @@ core_width = (
9091
)
9192

9293
core_height = (
93-
pitch_y * (rows - 1) + ce_height + margin_x * 2
94+
pitch_y * (rows - 1) + ce_height + margin_y * 2
9495
)
9596

9697
die_width = core_width + (array_spacing_x * 2)
@@ -371,6 +372,21 @@ MACROS = [
371372
srcs = [
372373
"simulate.cpp",
373374
],
375+
# Best way to refer to static names in Verilator generated code?
376+
copts = [
377+
"-DARRAY_COLS=\"{}\"".format(
378+
",".join([
379+
"&top->io_ins_down_{col}, &top->io_ins_up_{col}".format(col = col)
380+
for col in range(cols)
381+
]),
382+
),
383+
"-DARRAY_ROWS=\"{}\"".format(
384+
",".join([
385+
"&top->io_ins_left_{row}, &top->io_ins_right_{row}".format(row = row)
386+
for row in range(rows)
387+
]),
388+
),
389+
],
374390
cxxopts = [
375391
"-std=c++23",
376392
],
@@ -429,6 +445,8 @@ POWER_TESTS = [
429445
),
430446
],
431447
arguments = {
448+
"ARRAY_COLS": str(cols),
449+
"ARRAY_ROWS": str(rows),
432450
"LOAD_POWER_TCL": "$(location :load_power.tcl)",
433451
"OPENROAD_EXE": "$(location //src/sta:opensta)",
434452
"OUTPUT": "$(location :{name}_{stage}.txt)".format(

test/orfs/mock-array/constraints.sdc

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2,4 +2,6 @@ set clk_name clock
22
set clk_port_name clock
33
set clk_period 250
44

5+
set reg2out_max 160
6+
57
source $env(PLATFORM_DIR)/constraints.sdc

test/orfs/mock-array/load_power.tcl

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,8 +14,8 @@ log_cmd link_design MockArray
1414
log_cmd read_sdc $::env(RESULTS_DIR)/$::env(POWER_STAGE_STEM).sdc
1515
log_cmd read_spef $::env(RESULTS_DIR)/$::env(POWER_STAGE_STEM).spef
1616
puts "read_spef for ces_*_* macros"
17-
for { set x 0 } { $x < 8 } { incr x } {
18-
for { set y 0 } { $y < 8 } { incr y } {
17+
for { set x 0 } { $x < $::env(ARRAY_COLS) } { incr x } {
18+
for { set y 0 } { $y < $::env(ARRAY_ROWS) } { incr y } {
1919
log_cmd read_spef -path ces_${x}_${y} \
2020
$::env(RESULTS_DIR)/../../Element/base/$::env(POWER_STAGE_STEM).spef
2121
}

test/orfs/mock-array/power_instances.tcl

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,11 @@
11
source $::env(LOAD_POWER_TCL)
22

33
set instances [get_cells ces*/io_outs_*_mult]
4-
if { [llength $instances] != (64 * 4) } {
5-
puts "Error: Expected to find 64 Elements * 4 Multiplier instances, found [llength $instances]"
4+
5+
set num [expr $::env(ARRAY_COLS) * $::env(ARRAY_ROWS) * 4]
6+
7+
if { [llength $instances] != $num } {
8+
puts "Error: Expected to find $num instances, found [llength $instances]"
69
exit 1
710
}
811

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,42 +1,42 @@
11
{
22
"synth__design__instance__area__stdcell": {
3-
"value": 14315.22,
3+
"value": 3556.84,
44
"compare": "<="
55
},
66
"constraints__clocks__count": {
77
"value": 1,
88
"compare": "=="
99
},
1010
"placeopt__design__instance__area": {
11-
"value": 137855,
11+
"value": 5719,
1212
"compare": "<="
1313
},
1414
"placeopt__design__instance__count__stdcell": {
15-
"value": 9152,
15+
"value": 3950,
1616
"compare": "<="
1717
},
1818
"detailedplace__design__violations": {
1919
"value": 0,
2020
"compare": "=="
2121
},
2222
"cts__design__instance__count__setup_buffer": {
23-
"value": 796,
23+
"value": 344,
2424
"compare": "<="
2525
},
2626
"cts__design__instance__count__hold_buffer": {
27-
"value": 1614,
27+
"value": 344,
2828
"compare": "<="
2929
},
3030
"globalroute__antenna_diodes_count": {
3131
"value": 0,
3232
"compare": "<="
3333
},
3434
"detailedroute__route__wirelength": {
35-
"value": 127790,
35+
"value": 39799,
3636
"compare": "<="
3737
},
3838
"detailedroute__route__drc_errors": {
39-
"value": 1,
39+
"value": 0,
4040
"compare": "<="
4141
},
4242
"detailedroute__antenna__violating__nets": {
@@ -48,23 +48,23 @@
4848
"compare": "<="
4949
},
5050
"finish__timing__setup__ws": {
51-
"value": -115.35,
51+
"value": -0.89,
5252
"compare": ">="
5353
},
5454
"finish__design__instance__area": {
55-
"value": 138047,
55+
"value": 5728,
5656
"compare": "<="
5757
},
5858
"finish__timing__drv__setup_violation_count": {
59-
"value": 1040,
59+
"value": 172,
6060
"compare": "<="
6161
},
6262
"finish__timing__drv__hold_violation_count": {
63-
"value": 152,
63+
"value": 100,
6464
"compare": "<="
6565
},
6666
"finish__timing__wns_percent_delay": {
67-
"value": -40.47,
67+
"value": -10.0,
6868
"compare": ">="
6969
}
7070
}
Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,42 +1,42 @@
11
{
22
"synth__design__instance__area__stdcell": {
3-
"value": 14315.22,
3+
"value": 3556.84,
44
"compare": "<="
55
},
66
"constraints__clocks__count": {
77
"value": 1,
88
"compare": "=="
99
},
1010
"placeopt__design__instance__area": {
11-
"value": 137855,
11+
"value": 5719,
1212
"compare": "<="
1313
},
1414
"placeopt__design__instance__count__stdcell": {
15-
"value": 9152,
15+
"value": 3950,
1616
"compare": "<="
1717
},
1818
"detailedplace__design__violations": {
1919
"value": 0,
2020
"compare": "=="
2121
},
2222
"cts__design__instance__count__setup_buffer": {
23-
"value": 796,
23+
"value": 344,
2424
"compare": "<="
2525
},
2626
"cts__design__instance__count__hold_buffer": {
27-
"value": 1614,
27+
"value": 344,
2828
"compare": "<="
2929
},
3030
"globalroute__antenna_diodes_count": {
3131
"value": 0,
3232
"compare": "<="
3333
},
3434
"detailedroute__route__wirelength": {
35-
"value": 127790,
35+
"value": 39799,
3636
"compare": "<="
3737
},
3838
"detailedroute__route__drc_errors": {
39-
"value": 1,
39+
"value": 0,
4040
"compare": "<="
4141
},
4242
"detailedroute__antenna__violating__nets": {
@@ -48,23 +48,23 @@
4848
"compare": "<="
4949
},
5050
"finish__timing__setup__ws": {
51-
"value": -115.35,
51+
"value": -0.89,
5252
"compare": ">="
5353
},
5454
"finish__design__instance__area": {
55-
"value": 138047,
55+
"value": 5728,
5656
"compare": "<="
5757
},
5858
"finish__timing__drv__setup_violation_count": {
59-
"value": 1040,
59+
"value": 172,
6060
"compare": "<="
6161
},
6262
"finish__timing__drv__hold_violation_count": {
63-
"value": 152,
63+
"value": 100,
6464
"compare": "<="
6565
},
6666
"finish__timing__wns_percent_delay": {
67-
"value": -40.47,
67+
"value": -10.0,
6868
"compare": ">="
6969
}
7070
}

test/orfs/mock-array/simulate.cpp

Lines changed: 4 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -37,18 +37,10 @@ int main(int argc, char** argv)
3737
top->reset = 1;
3838
top->clock = 0;
3939

40-
QData* inputs[]
41-
= {&top->io_ins_down_0, &top->io_ins_down_1, &top->io_ins_down_2,
42-
&top->io_ins_down_3, &top->io_ins_down_4, &top->io_ins_down_5,
43-
&top->io_ins_down_6, &top->io_ins_down_7, &top->io_ins_left_0,
44-
&top->io_ins_left_1, &top->io_ins_left_2, &top->io_ins_left_3,
45-
&top->io_ins_left_4, &top->io_ins_left_5, &top->io_ins_left_6,
46-
&top->io_ins_left_7, &top->io_ins_right_0, &top->io_ins_right_1,
47-
&top->io_ins_right_2, &top->io_ins_right_3, &top->io_ins_right_4,
48-
&top->io_ins_right_5, &top->io_ins_right_6, &top->io_ins_right_7,
49-
&top->io_ins_up_0, &top->io_ins_up_1, &top->io_ins_up_2,
50-
&top->io_ins_up_3, &top->io_ins_up_4, &top->io_ins_up_5,
51-
&top->io_ins_up_6, &top->io_ins_up_7};
40+
// There's no great way to do this, we need to
41+
// refer to static names from Verilator generated code,
42+
// inject them on the command line.
43+
QData* inputs[] = {ARRAY_COLS, ARRAY_ROWS};
5244

5345
top->trace(vcd, 99); // Trace all levels of hierarchy
5446
vcd->open(args.front().data());

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