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Commit 8857a21

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Handle alignment.
1 parent 7c1e142 commit 8857a21

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3 files changed

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-0
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3 files changed

+5
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src/hotspot/cpu/ppc/gc/shared/barrierSetAssembler_ppc.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -338,6 +338,7 @@ int SaveLiveRegisters::iterate_over_register_mask(IterationAction action, int of
338338
VectorSRegister vs_reg = vm_reg->as_VectorSRegister();
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if (vs_reg->encoding() >= VSR32->encoding() && vs_reg->encoding() <= VSR51->encoding()) {
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reg_save_index += 2;
341+
align_up(reg_save_index, 2);
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342343
Register spill_addr = R0;
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int spill_offset = offset - reg_save_index * BytesPerWord;

src/hotspot/cpu/ppc/ppc.ad

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1818,6 +1818,7 @@ uint MachSpillCopyNode::implementation(C2_MacroAssembler *masm, PhaseRegAlloc *r
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else if (src_lo_rc == rc_vs && dst_lo_rc == rc_stack) {
18191819
VectorSRegister Rsrc = as_VectorSRegister(Matcher::_regEncode[src_lo]);
18201820
int dst_offset = ra_->reg2offset(dst_lo);
1821+
assert(is_aligned(dst_offset, StackAlignmentInBytes), "should be");
18211822
if (PowerArchitecturePPC64 >= 9) {
18221823
if (masm) {
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__ stxv(Rsrc, dst_offset, R1_SP);
@@ -1835,6 +1836,7 @@ uint MachSpillCopyNode::implementation(C2_MacroAssembler *masm, PhaseRegAlloc *r
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else if (src_lo_rc == rc_stack && dst_lo_rc == rc_vs) {
18361837
VectorSRegister Rdst = as_VectorSRegister(Matcher::_regEncode[dst_lo]);
18371838
int src_offset = ra_->reg2offset(src_lo);
1839+
assert(is_aligned(src_offset, StackAlignmentInBytes), "should be");
18381840
if (PowerArchitecturePPC64 >= 9) {
18391841
if (masm) {
18401842
__ lxv(Rdst, src_offset, R1_SP);

src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -354,6 +354,7 @@ OopMap* RegisterSaver::push_frame_reg_args_and_save_live_registers(MacroAssemble
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offset += reg_size;
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}
356356

357+
assert(is_aligned(offset, StackAlignmentInBytes), "should be");
357358
if (PowerArchitecturePPC64 >= 10) {
358359
for (int i = 0; i < vsregstosave_num; i += 2) {
359360
int reg_num = RegisterSaver_LiveVSRegs[i].reg_num;
@@ -444,6 +445,7 @@ void RegisterSaver::restore_live_registers_and_pop_frame(MacroAssembler* masm,
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offset += reg_size;
445446
}
446447

448+
assert(is_aligned(offset, StackAlignmentInBytes), "should be");
447449
if (PowerArchitecturePPC64 >= 10) {
448450
for (int i = 0; i < vsregstosave_num; i += 2) {
449451
int reg_num = RegisterSaver_LiveVSRegs[i].reg_num;

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