@@ -772,6 +772,9 @@ static_assert(sizeof(block_iq5_ks_r4) == 4*sizeof(block_iq5_ks), "wrong iq5_ks_r
772772#ifdef _MSC_VER
773773#include < immintrin.h>
774774
775+ #ifndef GGML_SIMD_OPERATORS_DEFINED
776+ #define GGML_SIMD_OPERATORS_DEFINED
777+
775778// AVX-512 integer bitwise operators
776779inline __m512i operator |(const __m512i& a, const __m512i& b) { return _mm512_or_si512 (a, b); }
777780inline __m512i operator &(const __m512i& a, const __m512i& b) { return _mm512_and_si512 (a, b); }
@@ -782,13 +785,16 @@ inline __m256i operator|(const __m256i& a, const __m256i& b) { return _mm256_or_
782785inline __m256i operator &(const __m256i& a, const __m256i& b) { return _mm256_and_si256 (a, b); }
783786inline __m256i operator ^(const __m256i& a, const __m256i& b) { return _mm256_xor_si256 (a, b); }
784787
788+ // NEON
785789#ifdef __ARM_NEON
786790#include < arm_neon.h>
787791inline uint8x16_t operator |(uint8x16_t a, uint8x16_t b) { return vorrq_u8 (a, b); }
788792inline uint8x16_t operator &(uint8x16_t a, uint8x16_t b) { return vandq_u8 (a, b); }
789793inline int8x16_t operator |(int8x16_t a, int8x16_t b) { return vreinterpretq_s8_u8 (vorrq_u8 (vreinterpretq_u8_s8 (a), vreinterpretq_u8_s8 (b))); }
790794inline int8x16_t operator &(int8x16_t a, int8x16_t b) { return vreinterpretq_s8_u8 (vandq_u8 (vreinterpretq_u8_s8 (a), vreinterpretq_u8_s8 (b))); }
791795#endif
796+
797+ #endif // GGML_SIMD_OPERATORS_DEFINED
792798#endif
793799#endif
794800// --- End MSVC SIMD operator overloads ---
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