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8 changes: 4 additions & 4 deletions pyrtl/memory.py
Original file line number Diff line number Diff line change
Expand Up @@ -259,10 +259,10 @@ def _build_read_port(self, addr):
def _assignment(self, item, val, is_conditional):
from .conditional import _build

item = as_wires(item, bitwidth=self.addrwidth, truncating=False)
if len(item) > self.addrwidth:
raise PyrtlError('error, the wire indexing the memory bitwidth > addrwidth')
addr = item
# Even though as_wires is already called on item already in the __getitem__ method,
# we need to call it again here because __setitem__ passes the original item
# to _assignment.
addr = as_wires(item, bitwidth=self.addrwidth, truncating=False)

if isinstance(val, MemBlock.EnabledWrite):
data, enable = val.data, val.enable
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