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- Update README
- Increase clock period in sky130hd/gcd/default_constraint.sdc - In two_phase_clk_synth.tcl - Use mode 5 for retiming instead of mode 4 - Call zero command again
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README.md

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@@ -47,7 +47,7 @@ timeline
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## Running ORFS with two-phase clocking with latches
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```
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make DESIGN_CONFIG=./designs/sky130hd/gcd/config.mk .DEFAULT_GOAL=place MODE=two_phase_clk | tee orfs.log
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time make DESIGN_CONFIG=./designs/sky130hd/gcd/config.mk .DEFAULT_GOAL=place MODE=two_phase_clk | tee orfs.log
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```
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## Running static timing analysis

flow/designs/sky130hd/gcd/default_constraint.sdc

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set clk_name core_clock
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set clk_port_name clk
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set clk_period [expr 3 * 1.1]
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set clk_period [expr 4 * 1.1]
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set clk_io_pct 0.2
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set clk_port [get_ports $clk_port_name]

flow/scripts/two_phase_clk_synth.tcl

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@@ -110,7 +110,7 @@ connect_clk *custom_FF_replace_1.mux_latch C clk_2
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design -save pre_retiming
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puts "Perform retiming"
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abc -keepff -dff -markgroups -script "+strash; zero; &get -n; print_latch; &fraig -x; &put; scorr; dc2; dretime -v; retime -M 4 -D 1 -o -v; strash; &get -n; &dch -f; &nf -D 1; &put"
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abc -keepff -dff -markgroups -script "+strash; zero; &get -n; print_latch; &fraig -x; &put; scorr; dc2; dretime -v; retime -M 5 -D 1 -o -v; strash; zero; &get -n; &dch -f; &nf -D 1; &put"
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opt -noff -purge
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design -save post_retiming

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