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galenbwillgalenbwill
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Corrected python docstring for LowLevelILFunction.float_convert
[thumb2] removed redundant format suffixes from disassembly of VFP instruction [thumb2] Corrected lifting of VCVT instruction
1 parent 193450b commit 2aa2a28

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3 files changed

+137
-40
lines changed

3 files changed

+137
-40
lines changed

‎arch/armv7/thumb2_disasm/disassembler.cpp‎

Lines changed: 10 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -317,15 +317,16 @@ std::string get_thumb_operation_name(struct decomp_result* result)
317317
contents += tlookup[tindex];
318318
contents += slookup[sindex];
319319
}
320-
if (format->operationFlags & INSTR_FORMAT_FLAG_F16) {
321-
contents += ".F16";
322-
}
323-
if (format->operationFlags & INSTR_FORMAT_FLAG_F32) {
324-
contents += ".F32";
325-
}
326-
if (format->operationFlags & INSTR_FORMAT_FLAG_F64) {
327-
contents += ".F64";
328-
}
320+
// These are obviated by the type specifier being included in the instruction_format.operation field in spec.cpp
321+
// if (format->operationFlags & INSTR_FORMAT_FLAG_F16) {
322+
// contents += ".F16";
323+
// }
324+
// if (format->operationFlags & INSTR_FORMAT_FLAG_F32) {
325+
// contents += ".F32";
326+
// }
327+
// if (format->operationFlags & INSTR_FORMAT_FLAG_F64) {
328+
// contents += ".F64";
329+
// }
329330

330331
if (format->operationFlags & INSTR_FORMAT_FLAG_WIDE) {
331332
contents += ".w";

‎arch/armv7/thumb2_disasm/il_thumb2.cpp‎

Lines changed: 125 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -1821,47 +1821,143 @@ bool GetLowLevelILForNEONInstruction(Architecture* arch, LowLevelILFunction& il,
18211821
il.AddInstruction(WriteILOperand(il, instr, 0, ReadILOperand(il, instr, 1), GetRegisterSize(instr, 1)));
18221822
break;
18231823
case armv7::ARMV7_VCVT:
1824-
if (instr->format->operandCount == 3)
1824+
// if (instr->format->operandCount == 3)
1825+
if (IS_FIELD_PRESENT(instr, FIELD_to_fixed))
18251826
{
1826-
// TODO: Fixed point unsupported.
1827+
if (IS_FIELD_PRESENT(instr, FIELD_imm))
1828+
{
1829+
// VCVT (between floating-point and fixed-point, Floating-point)
1830+
/* VCVT<c>.F32.<dt> <Sd>,<Sd>,#<imm> */
1831+
/* VCVT<c>.F64.<dt> <Dd>,<Dd>,#<imm> */
1832+
/* VCVT<c>.<dt> <Sd>,<Sd>,#<imm> */
1833+
/* VCVT<c>.<dt> <Dd>,<Dd>,#<imm> */
1834+
// TODO: fixed-point unsupported.
1835+
il.AddInstruction(il.Unimplemented());
1836+
}
1837+
else if (IS_FIELD_PRESENT(instr, FIELD_fbits))
1838+
{
1839+
// VCVT (between floating-point and fixed-point, Advanced SIMD)
1840+
/* VCVT<c>.<dt> <Dd>,<Dm>,#<fbits> */
1841+
/* VCVT<c>.<dt> <Qd>,<Qm>,#<fbits> */
1842+
// TODO: vector and fixed-point unsupported.
1843+
}
1844+
}
1845+
else if (IS_FIELD_PRESENT(instr, FIELD_half_to_single))
1846+
{
1847+
// VCVT (between half-precision and single-precision, Advanced SIMD)
1848+
/* VCVT<c>.F16.F32 <Dd>,<Qm> */
1849+
/* VCVT<c>.F32.F16 <Qd>,<Dm> */
1850+
// TODO: vector and half-precision unsupported.
18271851
il.AddInstruction(il.Unimplemented());
18281852
}
1829-
else if (instr->format->operationFlags & (INSTR_FORMAT_FLAG_F32 | INSTR_FORMAT_FLAG_F64))
1853+
else if (IS_FIELD_PRESENT(instr, FIELD_double_to_single))
18301854
{
1831-
il.AddInstruction(
1832-
WriteILOperand(il, instr, 0, il.FloatConvert(GetRegisterSize(instr, 1), ReadILOperand(il, instr, 1))));
1855+
// VCVT (between double-precision and single-precision)
1856+
/* VCVT<c>.F64.F32 <Dd>,<Sm> */
1857+
/* VCVT<c>.F32.F64 <Sd>,<Dm> */
1858+
il.AddInstruction(WriteILOperand(
1859+
il, instr, 0, il.FloatConvert(GetRegisterSize(instr, 1), ReadILOperand(il, instr, 1))));
1860+
break;
18331861
}
1834-
else if (IS_FIELD_PRESENT(instr, FIELD_td))
1862+
else if (IS_FIELD_PRESENT(instr, FIELD_to_integer))
18351863
{
1836-
switch (instr->fields[FIELD_dt])
1864+
if (IS_FIELD_PRESENT(instr, FIELD_td))
18371865
{
1838-
case VFP_DATA_SIZE_S32F32:
1839-
case VFP_DATA_SIZE_U32F32:
1840-
il.AddInstruction(WriteILOperand(
1841-
il, instr, 0, il.IntToFloat(GetRegisterSize(instr, 1), ReadILOperand(il, instr, 1))));
1842-
break;
1843-
case VFP_DATA_SIZE_F32S32:
1844-
case VFP_DATA_SIZE_F32U32:
1845-
il.AddInstruction(WriteILOperand(
1846-
il, instr, 0, il.FloatToInt(GetRegisterSize(instr, 1), ReadILOperand(il, instr, 1))));
1847-
break;
1848-
default:
1849-
il.AddInstruction(il.Unimplemented());
1866+
// VCVT (between floating-point and integer, Advanced SIMD)
1867+
/* VCVT<c>.<dt> <Dd>,<Dm> */ // instr->fields[FIELD_regs] = 1
1868+
/* VCVT<c>.<dt> <Qd>,<Qm> */ // instr->fields[FIELD_regs] = 2
1869+
switch (instr->fields[FIELD_dt])
1870+
{
1871+
case VFP_DATA_SIZE_S32F32:
1872+
case VFP_DATA_SIZE_U32F32:
1873+
// TODO: iterate over vector components
1874+
// il.AddInstruction(WriteILOperand(
1875+
// il, instr, 0, il.IntToFloat(GetRegisterSize(instr, 1), ReadILOperand(il, instr, 1))));
1876+
// break;
1877+
case VFP_DATA_SIZE_F32S32:
1878+
case VFP_DATA_SIZE_F32U32:
1879+
// TODO: iterate over vector components
1880+
// il.AddInstruction(WriteILOperand(
1881+
// il, instr, 0, il.FloatToInt(GetRegisterSize(instr, 1),
1882+
// il.RoundToInt(GetRegisterSize(instr, 1),
1883+
// ReadILOperand(il, instr, 1)))));
1884+
// break;
1885+
default:
1886+
// TODO: vector unsupported.
1887+
il.AddInstruction(il.Unimplemented());
1888+
}
18501889
}
1851-
}
1852-
else
1853-
{
1854-
switch (instr->fields[FIELD_dt])
1890+
else if (instr->format->operationFlags & (INSTR_FORMAT_FLAG_F32 | INSTR_FORMAT_FLAG_F64))
18551891
{
1856-
case VFP_DATA_SIZE_F32:
1857-
case VFP_DATA_SIZE_S32:
1892+
switch (instr->fields[FIELD_dt])
1893+
{
1894+
case VFP_DATA_SIZE_S32:
1895+
il.AddInstruction(WriteILOperand(
1896+
il, instr, 0, il.IntToFloat(GetRegisterSize(instr, 0),
1897+
il.SignExtend(GetRegisterSize(instr, 0),
1898+
ReadILOperand(il, instr, 1)))));
1899+
break;
1900+
case VFP_DATA_SIZE_U32:
1901+
il.AddInstruction(WriteILOperand(
1902+
il, instr, 0, il.IntToFloat(GetRegisterSize(instr, 0),
1903+
il.ZeroExtend(GetRegisterSize(instr, 0),
1904+
ReadILOperand(il, instr, 1)))));
1905+
break;
1906+
}
1907+
// il.AddInstruction(WriteILOperand(
1908+
// il, instr, 0, il.IntToFloat(GetRegisterSize(instr, 0), ReadILOperand(il, instr, 1))));
1909+
}
1910+
else
1911+
{
1912+
// VCVT, VCVTR (between floating-point and integer, Floating-point)
1913+
switch (instr->fields[FIELD_dt])
1914+
{
1915+
case VFP_DATA_SIZE_S32F32:
1916+
il.AddInstruction(WriteILOperand(
1917+
il, instr, 0, il.SignExtend(GetRegisterSize(instr, 0),
1918+
il.FloatToInt(GetRegisterSize(instr, 0),
1919+
il.RoundToInt(GetRegisterSize(instr, 0),
1920+
ReadILOperand(il, instr, 1))))));
1921+
break;
1922+
case VFP_DATA_SIZE_U32F32:
1923+
// case VFP_DATA_SIZE_S32F64:
1924+
// case VFP_DATA_SIZE_U32F64:
18581925
il.AddInstruction(WriteILOperand(
1859-
il, instr, 0, il.FloatConvert(GetRegisterSize(instr, 1), ReadILOperand(il, instr, 1))));
1860-
break;
1861-
default:
1862-
il.AddInstruction(il.Unimplemented());
1926+
il, instr, 0, il.ZeroExtend(GetRegisterSize(instr, 0),
1927+
il.FloatToInt(GetRegisterSize(instr, 0),
1928+
il.RoundToInt(GetRegisterSize(instr, 0),
1929+
ReadILOperand(il, instr, 1))))));
1930+
// il.AddInstruction(WriteILOperand(
1931+
// il, instr, 0, il.FloatToInt(GetRegisterSize(instr, 1),
1932+
// il.RoundToInt(GetRegisterSize(instr, 1),
1933+
// ReadILOperand(il, instr, 1)))));
1934+
break;
1935+
case VFP_DATA_SIZE_F32S32:
1936+
case VFP_DATA_SIZE_F32U32:
1937+
il.AddInstruction(WriteILOperand(
1938+
il, instr, 0, il.IntToFloat(GetRegisterSize(instr, 0), ReadILOperand(il, instr, 1))));
1939+
break;
1940+
default:
1941+
// Invalid
1942+
il.AddInstruction(il.Unimplemented());
1943+
}
18631944
}
18641945
}
1946+
// else if (IS_FIELD_PRESENT(instr, FIELD_dt))
1947+
// {
1948+
// switch (instr->fields[FIELD_dt])
1949+
// {
1950+
// case VFP_DATA_SIZE_F32:
1951+
// case VFP_DATA_SIZE_S32:
1952+
// il.AddInstruction(WriteILOperand(
1953+
// il, instr, 0, il.FloatConvert(GetRegisterSize(instr, 1), ReadILOperand(il, instr, 1))));
1954+
// break;
1955+
// default:
1956+
// il.AddInstruction(il.Unimplemented());
1957+
// }
1958+
// }
1959+
else
1960+
il.AddInstruction(il.Unimplemented());
18651961
break;
18661962
case armv7::ARMV7_VMOV:
18671963
if (instr->format->operandCount == 4)

‎python/lowlevelil.py‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5797,10 +5797,10 @@ def float_convert(
57975797
loc: Optional['ILSourceLocation'] = None
57985798
) -> ExpressionIndex:
57995799
"""
5800-
``int_to_float`` converts floating point value of expression ``value`` to size ``size`` potentially setting flags
5800+
``float_convert`` converts floating point value of expression ``value`` to size ``size`` potentially setting flags
58015801
58025802
:param int size: the size of the result in bytes
5803-
:param ExpressionIndex value: the expression to negate
5803+
:param ExpressionIndex value: the expression to convert to a float of ``size`` bytes
58045804
:param str flags: optional, flags to set
58055805
:param ILSourceLocation loc: location of returned expression
58065806
:return: The expression ``fconvert.<size>{<flags>}(value)``

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