Merge https://github.com/Vector35/binaryninja-api into dev

Author: v1X3Q0

api-docs/spelling.txt

@@ -0,0 +1,231 @@
+dev
+decompilation
+Flowgraph
+flowgraph
+headlessly
+func
+minLevel
+BasicBlockList
+websocket
+Subclasses
+subclasses
+subclassed
+mips32
+llvm
+mc
+yasm
+nop
+disassembler
+len
+lowlevelil
+mediumlevelil
+highlevelil
+py
+url
+gui
+websocketprovider
+desc
+ver
+signedness
+const
+InstructionTextToken
+parsable
+param
+namespace
+addr
+regs
+sym
+enum
+preproccessed
+QualifiedNameType
+typecontainer
+typelibrary
+guid
+typeprinter
+Preprocess
+typeparser
+libc
+musl
+api
+lookups
+QualifiedName
+Unregister
+readOnly
+requiresRestart
+uiSelectionAction
+typearchive
+SettingsUserScope
+maxValue
+minValue
+enumDescriptions
+elementType
+json
+deserializing
+schemas
+callsite
+secretsprovider
+kwargs
+args
+bnpr
+bndb
+bnpm
+pluginmanager
+scriptingprovider
+globals
+cancelation
+cancelled
+cancelable
+programmatically
+stdcall
+il
+cdecl
+fastcall
+iterable
+postfix
+Tailcall
+indexable
+unsplit
+splittable
+llil
+mlil
+hlil
+ssa
+dataflow
+macOS
+goto
+pre
+bitwise
+Plaintext
+plaintext
+whitespace
+pyside
+pre
+init
+fini
+dll
+namespaces
+unparented
+matcher
+endianness
+endian
+Endianness
+accessor
+os
+Pathlike
+FileAccessor
+fileaccessor
+enums
+TagTypeType
+pythonic
+mainthread
+lineardisassembly
+functionrecognizer
+inlined
+str
+reimplementation
+subgraphs
+subgraph
+liveness
+nav
+undoable
+interop
+filemetadata
+externallibrary
+downloadprovider
+docstring
+unittests
+simplifier
+templated
+demangled
+demangles
+demangler
+demangle
+dlang
+itanium
+msvc
+parsers
+debuginfo
+stdout
+stdin
+aarch
+armv
+rebase
+rebased
+MetadataValueType
+binaryninja
+backend
+Windbg
+pc
+bv
+debuggercontroller
+dword
+qword
+rebasing
+debugadaptertype
+reStructured
+renderer
+kvs
+databuffer
+callingconvention
+Pathname
+pathname
+Pathnames
+pathnames
+autoanalysis
+ReferenceSource
+TypeFieldReference
+bss
+shannon
+CoreSymbol
+quadword
+datarender
+getattr
+commonil
+dir
+getattr
+readline
+selectable
+attr
+bncompleter
+DataBuffer
+PathLike
+evaluable
+unregisters
+undefine
+tagRECT
+winX
+typelib
+dest
+autoanalysis
+unassociated
+ith
+getter
+setter
+callee
+callees
+nops
+linearsweep
+signaturematcher
+metaclass
+mips
+ExpressionIndex
+CallingConvention
+basedetection
+basicblock
+DisassemblyTextLine
+dominator
+dominators
+binaryview
+queryable
+prefetch
+quiesces
+quiesced
+quiescing
+subclassing
+Comparison
+dereferencing
+dereference
+deconflicted
+guids
+cbreak
+overridable

arch/arm64/arch_arm64.cpp

@@ -1511,7 +1511,7 @@ class Arm64Architecture : public Architecture
 		case IL_FLAG_Z:
 			return ZeroFlagRole;
 		case IL_FLAG_C:
-			return CarryFlagRole;
+			return CarryFlagWithInvertedSubtractRole;
 		case IL_FLAG_V:
 			return OverflowFlagRole;
 		default:

arch/armv7/arch_armv7.cpp

@@ -1734,7 +1734,7 @@ BNFlagRole ArmCommonArchitecture::GetFlagRole(uint32_t flag, uint32_t)
 	case IL_FLAG_Z:
 		return ZeroFlagRole;
 	case IL_FLAG_C:
-		return CarryFlagRole;
+		return CarryFlagWithInvertedSubtractRole;
 	case IL_FLAG_V:
 		return OverflowFlagRole;
 	default:

arch/mips/arch_mips.cpp

@@ -928,6 +928,8 @@ class MipsArchitecture: public Architecture
 				return "moveDwordToCoprocessorUnimplemented";
 			case MIPS_INTRIN_SYNC:
 				return "_sync";
+			case MIPS_INTRIN_SYNCI:
+				return "_SynchronizeCacheLines";
 			case MIPS_INTRIN_EI:
 				return "_enableInterrupts";
 			case MIPS_INTRIN_DI:
@@ -936,6 +938,8 @@ class MipsArchitecture: public Architecture
 				return "_clearExecutionHazards";
 			case MIPS_INTRIN_WAIT:
 				return "_enterLowPowerMode";
+			case MIPS_INTRIN_PAUSE:
+				return "_waitForLLbitClear";
 			case MIPS_INTRIN_HWR0:
 				return "_cpuNum";
 			case MIPS_INTRIN_HWR1:
@@ -956,6 +960,8 @@ class MipsArchitecture: public Architecture
 				return "_prefetch";
 			case MIPS_INTRIN_CACHE:
 				return "_cache";
+			case MIPS_INTRIN_SDBBP:
+				return "_softwareDebugBreakpoint";
 			case MIPS_INTRIN_GET_LEFT_PART32:
 				return "_getLeftPart32";
 			case MIPS_INTRIN_GET_RIGHT_PART32:
@@ -972,6 +978,16 @@ class MipsArchitecture: public Architecture
 				return "_setLeftPart64";
 			case MIPS_INTRIN_SET_RIGHT_PART64:
 				return "_setRightPart64";
+			case MIPS_INTRIN_TLBSET:
+				return "_writeTLB";
+			case MIPS_INTRIN_TLBGET:
+				return "_readTLB";
+			case MIPS_INTRIN_TLBSEARCH:
+				return "_probeTLB";
+			case MIPS_INTRIN_TLBINV:
+				return "_invalidateTLB";
+			case MIPS_INTRIN_TLBINVF:
+				return "_invalidateTLBFlush";
 
 			case CNMIPS_INTRIN_SYNCIOBDMA:
 				return "_synciobdma";
@@ -1009,10 +1025,12 @@ class MipsArchitecture: public Architecture
 			MIPS_INTRIN_DMTC0,
 			MIPS_INTRIN_DMTC_UNIMPLEMENTED,
 			MIPS_INTRIN_SYNC,
+			MIPS_INTRIN_SYNCI,
 			MIPS_INTRIN_DI,
 			MIPS_INTRIN_EHB,
 			MIPS_INTRIN_EI,
 			MIPS_INTRIN_WAIT,
+			MIPS_INTRIN_PAUSE,
 			MIPS_INTRIN_HWR0,
 			MIPS_INTRIN_HWR1,
 			MIPS_INTRIN_HWR2,
@@ -1031,6 +1049,11 @@ class MipsArchitecture: public Architecture
 			MIPS_INTRIN_GET_RIGHT_PART64,
 			MIPS_INTRIN_SET_LEFT_PART64,
 			MIPS_INTRIN_SET_RIGHT_PART64,
+			MIPS_INTRIN_TLBSET,
+			MIPS_INTRIN_TLBGET,
+			MIPS_INTRIN_TLBSEARCH,
+			MIPS_INTRIN_TLBINV,
+			MIPS_INTRIN_TLBINVF,
 
 			CNMIPS_INTRIN_SYNCIOBDMA,
 			CNMIPS_INTRIN_SYNCS,
@@ -1100,6 +1123,10 @@ class MipsArchitecture: public Architecture
 				return {
 					NameAndType("stype", Type::IntegerType(4, false)),
 				};
+			case MIPS_INTRIN_SYNCI:
+				return {
+					NameAndType("vaddr", Type::IntegerType(8, false)),
+				};
 			case MIPS_INTRIN_HWR_UNKNOWN:
 				return {
 					NameAndType("hwreg", Type::IntegerType(4, false)),
@@ -1115,6 +1142,11 @@ class MipsArchitecture: public Architecture
 					NameAndType("address", Type::IntegerType(m_bits == 64 ? 8 : 4, false)),
 				};
 
+			case MIPS_INTRIN_SDBBP:
+				return {
+					NameAndType("code", Type::IntegerType(1, false)),
+				};
+
 			// NOTE: SET_x_PARTx could potentially benefit from
 			//       including the old value as an input (since each
 			//       only sets part of the register and keeps the
@@ -1161,6 +1193,33 @@ class MipsArchitecture: public Architecture
 				return {
 					NameAndType("rightpart", Type::IntegerType(8, false))
 				};
+			case MIPS_INTRIN_TLBSET:
+				return {
+					// we use the same order as the pseudocode
+					// in the documentation
+					NameAndType("index", Type::IntegerType(8, false)),
+					NameAndType("PageMask", Type::IntegerType(8, false)),
+					NameAndType("EntryHi", Type::IntegerType(8, false)),
+					NameAndType("EntryLo1", Type::IntegerType(8, false)),
+					NameAndType("EntryLo0", Type::IntegerType(8, false))
+				};
+			case MIPS_INTRIN_TLBGET:
+				return {
+					NameAndType("index", Type::IntegerType(8, false)),
+				};
+			case MIPS_INTRIN_TLBSEARCH:
+				return {
+					NameAndType("match", Type::IntegerType(8, false)),
+				};
+			case MIPS_INTRIN_TLBINV:
+				return {
+					NameAndType("index", Type::IntegerType(8, false)),
+					NameAndType("match", Type::IntegerType(8, false)),
+				};
+			case MIPS_INTRIN_TLBINVF:
+				return {
+					NameAndType("index", Type::IntegerType(8, false)),
+				};
 			default:
 				return vector<NameAndType>();
 		}
@@ -1204,6 +1263,19 @@ class MipsArchitecture: public Architecture
 			case MIPS_INTRIN_SET_LEFT_PART64:
 			case MIPS_INTRIN_SET_RIGHT_PART64:
 				return {Type::IntegerType(8, false)};
+			case MIPS_INTRIN_TLBGET:
+				return {
+					// we use the same order as the pseudocode
+					// in the documentation:
+
+					// PageMask, EntryHi, EntryLo1, EntryLo0
+					Type::IntegerType(8, false),
+					Type::IntegerType(8, false),
+					Type::IntegerType(8, false),
+					Type::IntegerType(8, false),
+				};
+			case MIPS_INTRIN_TLBSEARCH:
+				return { Type::IntegerType(8, false) };
 			default:
 				return vector<Confidence<Ref<Type>>>();
 		}