@@ -1053,8 +1053,8 @@ bool feedsAnyExtBcstUse(MachineInstr &MI, MachineRegisterInfo &MRI,
10531053 const AIEBaseInstrInfo &TII) {
10541054 assert (MI.getOpcode () == TargetOpcode::G_EXTRACT_VECTOR_ELT);
10551055
1056- auto GetSingleNonDbgUse = [&MRI](MachineInstr &MI,
1057- unsigned UseMIOpcode) -> MachineInstr * {
1056+ auto IsSingleNonDbgUse = [&MRI](MachineInstr &MI,
1057+ unsigned UseMIOpcode) -> MachineInstr * {
10581058 const Register Dst = MI.getOperand (0 ).getReg ();
10591059 if (!MRI.hasOneNonDBGUse (Dst))
10601060 return nullptr ;
@@ -1065,19 +1065,19 @@ bool feedsAnyExtBcstUse(MachineInstr &MI, MachineRegisterInfo &MRI,
10651065 return UseMI;
10661066 };
10671067
1068- auto *AnyExtMI = GetSingleNonDbgUse (MI, TargetOpcode::G_ANYEXT);
1068+ auto *AnyExtMI = IsSingleNonDbgUse (MI, TargetOpcode::G_ANYEXT);
10691069 if (!AnyExtMI)
10701070 return false ;
10711071
10721072 auto *BcstMI =
1073- GetSingleNonDbgUse (*AnyExtMI, TII.getGenericBroadcastVectorOpcode ());
1074- return ( bool ) BcstMI;
1073+ IsSingleNonDbgUse (*AnyExtMI, TII.getGenericBroadcastVectorOpcode ());
1074+ return BcstMI;
10751075}
10761076} // namespace
10771077
10781078bool llvm::matchExtractVecEltAndExt (
10791079 MachineInstr &MI, MachineRegisterInfo &MRI, const AIEBaseInstrInfo &TII,
1080- std::tuple <MachineInstr *, bool , bool > &MatchInfo) {
1080+ std::pair <MachineInstr *, std::pair< bool , bool > > &MatchInfo) {
10811081 assert (MI.getOpcode () == TargetOpcode::G_EXTRACT_VECTOR_ELT &&
10821082 " Expected a extract_vector_elt" );
10831083 Register DstReg = MI.getOperand (0 ).getReg ();
@@ -1094,10 +1094,10 @@ bool llvm::matchExtractVecEltAndExt(
10941094 switch (ExtMI->getOpcode ()) {
10951095 case TargetOpcode::G_ANYEXT:
10961096 case TargetOpcode::G_SEXT:
1097- MatchInfo = { ExtMI, /* SEXT=*/ true , BuildAssert} ;
1097+ MatchInfo = std::make_pair ( ExtMI, std::make_pair ( /* SEXT=*/ 1 , BuildAssert)) ;
10981098 return true ;
10991099 case TargetOpcode::G_ZEXT:
1100- MatchInfo = { ExtMI, /* SEXT=*/ false , BuildAssert} ;
1100+ MatchInfo = std::make_pair ( ExtMI, std::make_pair ( /* SEXT=*/ 0 , BuildAssert)) ;
11011101 return true ;
11021102 default :
11031103 return false ;
@@ -1107,9 +1107,10 @@ bool llvm::matchExtractVecEltAndExt(
11071107
11081108void llvm::applyExtractVecEltAndExt (
11091109 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B,
1110- std::tuple <MachineInstr *, bool , bool > &MatchInfo) {
1110+ std::pair <MachineInstr *, std::pair< bool , bool > > &MatchInfo) {
11111111 B.setInstrAndDebugLoc (MI);
1112- auto [MatchMI, IsSignedExt, BuildAssert] = MatchInfo;
1112+ auto [MatchMI, BoolPair] = MatchInfo;
1113+ auto [IsSignedExt, BuildAssert] = BoolPair;
11131114
11141115 const Register ExtractDstReg = MI.getOperand (0 ).getReg ();
11151116 const LLT ExtractDstTy = MRI.getType (ExtractDstReg);
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