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Xilinx / llvm-aie Public

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[Draft][wip] Support composite vector register class for register allocation.#433

Draft

niwinanto wants to merge 6 commits intoaie-publicXilinx/llvm-aie:aie-publicfrom

niwin.lanemask.regbankXilinx/llvm-aie:niwin.lanemask.regbankCopy head branch name to clipboard

Conversation Commits6 (6)Checks Files changed

Draft

[Draft][wip] Support composite vector register class for register allocation.#433
niwinanto wants to merge 6 commits intoaie-publicfrom
niwin.lanemask.regbank

Commits

Commits on Apr 29, 2025

[AIE2P] revert separate subregister index for accumulator
niwinanto
committed
[AIE2P] Create dummy 256-bit accumulator and compose it with 512-bit to mimic vector register hierarchy
niwinanto
committed
[AIE2P] Spill to register instead of stack
niwinanto
committed
[AIE2P] Extend vector composite register class with fifo registers
niwinanto
committed
[AIE2P] Spill composed vector registers to stack
niwinanto
committed
[AIE2P][Fix-up] Remove fifo store register from composed regclass
niwinanto
committed

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