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Highlights:

  • Added support for xc-dsc toolchain: CMake scripts, linker files
  • Arch bring-up for dsPIC (Curiosity board): thread creation, early boot, swap
  • CMake: Improved path detection, removed debug messages, static lib fixes
  • Interrupt vector table (IVT) initialization and macro definition
  • MISRA compliance fixes
  • Various bug fixes, stylistic cleanup, and compliance-related updates

Changes:

  • cmake: Add xc-dsc toolchain support and linker script
  • arch: dspic: Rename isr_table_vt.ld to vector_table.ld
  • camke: Fix path detection for build dependencies
  • cmake: Resolve include path issues
  • cmake: Remove debug messages
  • arch: dspic: Add thread creation and init logic
  • arch: Resolve arch_swap implicit declaration warning
  • arch: Add vector tables and common ISR wrapper
  • cmake: Enable compiling assembly files
  • cmake: Fix static library linking
  • arch: Support IVT table placement and macros
  • cmake: Skip init priorities check for xc-dsc
  • toolchain: Remove stdlib usage (use picolibc instead)
  • arch: Remove use of unimplemented functions
  • arch: Early boot sequence implementation
  • arch: Task swap and main thread entry logic

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github-actions bot commented Jul 3, 2025

The following west manifest projects have changed revision in this Pull Request:

Name Old Revision New Revision Diff

All manifest checks OK

Note: This message is automatically posted and updated by the Manifest GitHub Action.

@harishagari harishagari requested a review from NhMchp July 4, 2025 07:41
Udhayanandhan-Jayakumar and others added 2 commits July 10, 2025 16:03
Highlights:
- Added support for xc-dsc toolchain: CMake scripts, linker files
- Arch bring-up for dsPIC (Curiosity board): thread creation,
  early boot, swap
- CMake: Improved path detection, removed debug messages, static lib fixes
- Interrupt vector table (IVT) initialization and macro definition
- MISRA compliance fixes
- Various bug fixes, stylistic cleanup, and compliance-related updates

Changes:
* cmake: Add xc-dsc toolchain support and linker script
* arch: dspic: Rename isr_table_vt.ld to vector_table.ld
* camke: Fix path detection for build dependencies
* cmake: Resolve include path issues
* cmake: Remove debug messages
* arch: dspic: Add thread creation and init logic
* arch: Resolve arch_swap implicit declaration warning
* arch: Add vector tables and common ISR wrapper
* cmake: Enable compiling assembly files
* cmake: Fix static library linking
* arch: Support IVT table placement and macros
* cmake: Skip init priorities check for xc-dsc
* toolchain: Remove stdlib usage (use picolibc instead)
* arch: Remove use of unimplemented functions
* arch: Early boot sequence implementation
* arch: Task swap and main thread entry logic

Signed-off-by: Udhayanandhan Jayakumar <[email protected]>
Add copyright and license headers to Kconfigs and other files

Signed-off-by: Muhammed Zamroodh <[email protected]>
@MuhammedZamroodh MuhammedZamroodh force-pushed the mchp_zephyr_dspic_release_v2.0 branch 2 times, most recently from 04ce5b4 to 5247a5b Compare July 10, 2025 10:44
The custom const sections are placed in FLASH and
being copied from .dinit to Flash again, We can avoid
that by placing the section in RAM to begin with

Signed-off-by: Muhammed Zamroodh <[email protected]>
@MuhammedZamroodh MuhammedZamroodh force-pushed the mchp_zephyr_dspic_release_v2.0 branch from 5247a5b to b62dbcc Compare July 10, 2025 10:51
string
default "dspic"

config NUM_IRQS
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This can vary from SoC to SoC, in that case how do we handle this?

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IRQ shall only be part of SoC definitions

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Noted, will analyse the changes needed.

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This is Kconfig file and we can have different values for this in respective SOC definictions

#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
void arch_cpu_atomic_idle(unsigned int key)
{
(void)key;
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shouldnt we use pwrsav instruction here?

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@harishagari
We will be adding the logic soon
Right now we just added the stubs

__start:
;; Initialize stack pointer and limit
mov.l #__SP_init, w15 ; Stack pointer (W15)
mov.l #__SPLIM_init, w14 ; Stack limit (W14)
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W14 is stack frame pointer , SPLIM is stack pointer limit register. Do we want to initialize w14 or SPLIM here?

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Here we needed to write back the value from w14 to SPLIM. This was a mistake, will take care with next changes.

uint32_t RCOUNT; /* repeat count register*/
uint32_t FSR; /* Floating point status register */
uint32_t FCR; /* Floating point control register*/
uint32_t W0; /* working register W0 */
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@harishagari harishagari Jul 11, 2025

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Copy-Paste Error: Register name in the comments

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Noted: Will be addressed with the next set of patches

config FLASH_BASE_ADDRESS
default 0x00800000

config SRAM_SIZE
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dsPIC33AK128MC106 RAM size is 16KB
image

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This info will be soon moved to devicetree file, will be updating/correcting it there

* will be non-zero while sys_clock_announce() is executing and zero
* otherwise.
*/
#ifdef TO_BE_IMPLEMENTED_LATER
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doesn't this placeholder macro effect other architectures?

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Yes, but was necessary as we dont have a lot of implementation logic completed.

We will see a lot of these removed in the coming milestone

",%c0" \
"\n\t.type\t" #name ",%%object" : : "n"(value))

#define GEN_ABSOLUTE_SYM_KCONFIG(name, value) \
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may be we can undo these changes(606-608)

@@ -0,0 +1,2977 @@
/*
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Isn't this linker script specific to dsPIC33AK128MC106?

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Yes, but a lot of changes are being made to make this generic.
We had issues with linker and its syntax. In works to get it resolved, will finaly endup with the generic script and fragements specific to different chip if needed

"mov.l #0x8, w1\n\t"
"add w0, w1, w1\n\t"
"mov.l [w1], w2\n\t"
"mov.l #0x28, w1\n\t"
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@harishagari harishagari Jul 18, 2025

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can we have the constants defined for the #0x28, #0x8 etc which are used at multiple places?

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There is a method in build system to have symbols giving offsets to members of structure. We will be moving to that.
It was not used here as we need to do right changes for this toolchain to get that working.

Will be adding that in the coming milestones

@@ -1,3 +1,6 @@
# Copyright (c) 2025, Microchip Technology Inc.
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@AzharMCHP AzharMCHP Jul 29, 2025

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The comma is not required in the copyright header.
It should be as follows:

# Copyright (c) 2025 Microchip Technology Inc.
# SPDX-License-Identifier: Apache-2.0

This can be updated everywhere

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Will start changing all files in coming commits. Please expect this in coming release

@@ -0,0 +1 @@
/*Nothing here */
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You can remove this file if not used, can be added later

@@ -0,0 +1,60 @@
/**
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This file should be placed under 'dts/dspic/microchip'

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OK, but should we need this as microchip is the only vendor who will use this arch

NhMchp pushed a commit that referenced this pull request Sep 15, 2025
Add support for NV12/NV21, NV16/NV61 and YUV420/YVU420
(semi)planar formats which can be output by the main #1 pipe.

Signed-off-by: Alain Volmat <[email protected]>
@NhMchp NhMchp merged commit b62dbcc into dsPIC33A Oct 8, 2025
9 of 10 checks passed
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6 participants