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WalterBrightthewilsonator
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generalize genmovreg()
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  • compiler/src/dmd/backend/arm

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+28
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compiler/src/dmd/backend/arm/cod3.d

Lines changed: 28 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1395,25 +1395,44 @@ L3:
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/**************************
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* Generate a MOV to,from register instruction.
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* Smart enough to dump redundant register moves, and segment
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* register moves.
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* register moves. No conversions are done.
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* Params:
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* cdb = code sink
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* to = destination register
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* from = source register
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* ty = type, TYMAX means use full register
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*/
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@trusted
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void genmovreg(ref CodeBuilder cdb, reg_t to, reg_t from, tym_t ty = TYMAX)
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{
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if (to != from)
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{
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if (mask(to) & INSTR.FLOATREGS)
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if (!((to | from) & 32)) // both are gp registers
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{
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// floating point
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uint ftype = INSTR.szToFtype(ty == TYMAX ? 8 : _tysize[ty]);
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cdb.gen1(INSTR.fmov(ftype, from & 31, to & 31));
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// integer
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const uint sf = ty == TYMAX || _tysize[ty] == 8;
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cdb.gen1(INSTR.mov_register(sf, from, to)); // MOV gp,gp https://www.scs.stanford.edu/~zyedidia/arm64/mov_orr_log_shift.html
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}
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else
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else // one or both are floating point registers
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{
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// integer
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uint sf = ty == TYMAX || _tysize[ty] == 8;
1416-
cdb.gen1(INSTR.mov_register(sf, from, to)); // MOV to,from
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const uint ftype = INSTR.szToFtype(ty == TYMAX ? 8 : _tysize[ty]);
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if (to & from & 32) // both are fp registers
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{
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// floating point
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cdb.gen1(INSTR.fmov(ftype, from, to)); // FMOV fp,fp https://www.scs.stanford.edu/~zyedidia/arm64/fmov_float.html
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}
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else if ((to & 32) && !(from & 32))
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{
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cdb.gen1(INSTR.fmov_float_gen(1,ftype,0,7,from,to)); // FMOV fp,gp https://www.scs.stanford.edu/~zyedidia/arm64/fmov_float_gen.html
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}
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else if (!(to & 32) && (from & 32))
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{
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cdb.gen1(INSTR.fmov_float_gen(1,ftype,0,6,from,to)); // FMOV gp,fp https://www.scs.stanford.edu/~zyedidia/arm64/fmov_float_gen.html
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}
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else
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assert(0);
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}
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}
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}

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