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Fixed register settings for divider SI5351_MULTISYNTH_DIV_4#4

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Fixed register settings for divider SI5351_MULTISYNTH_DIV_4#4
hasepompase wants to merge 1 commit intoadafruit:masterfrom
hasepompase:master

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@hasepompase
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With these changes it is now possible to set frequencies up to 225 MHz.

@kamocat
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kamocat commented Jul 4, 2022

This seems to address #18
I applied these changes to the latest version, I can get outputs of up to 300MHz now by running the PLL multipler up to 1.2GHz

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