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deanm1278deanm1278
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DM: update sercom IRQs for M4
1 parent fb41af4 commit 6826404

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3 files changed

+109
-19
lines changed

3 files changed

+109
-19
lines changed

‎bootloaders/metroM4/.vs/samdx1_sam_ba/v14/.atsuo

-1 KB
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‎cores/arduino/SERCOM.cpp

Lines changed: 96 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -646,7 +646,6 @@ uint8_t SERCOM::readDataWIRE( void )
646646

647647
void SERCOM::initClockNVIC( void )
648648
{
649-
IRQn_Type IdNvic=PendSV_IRQn ; // Dummy init to intercept potential error later
650649

651650
#if defined(__SAMD51__)
652651
uint32_t clk_core;
@@ -656,46 +655,126 @@ void SERCOM::initClockNVIC( void )
656655
{
657656
clk_core = SERCOM0_GCLK_ID_CORE;
658657
clk_slow = SERCOM0_GCLK_ID_SLOW;
659-
IdNvic = SERCOM0_0_IRQn;
658+
659+
NVIC_ClearPendingIRQ(SERCOM0_0_IRQn);
660+
NVIC_ClearPendingIRQ(SERCOM0_1_IRQn);
661+
NVIC_ClearPendingIRQ(SERCOM0_2_IRQn);
662+
NVIC_ClearPendingIRQ(SERCOM0_3_IRQn);
663+
664+
NVIC_SetPriority (SERCOM0_0_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority */
665+
NVIC_SetPriority (SERCOM0_1_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
666+
NVIC_SetPriority (SERCOM0_2_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
667+
NVIC_SetPriority (SERCOM0_3_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
668+
669+
NVIC_EnableIRQ(SERCOM0_0_IRQn);
670+
NVIC_EnableIRQ(SERCOM0_1_IRQn);
671+
NVIC_EnableIRQ(SERCOM0_2_IRQn);
672+
NVIC_EnableIRQ(SERCOM0_3_IRQn);
660673
}
661674
else if(sercom == SERCOM1)
662675
{
663676
clk_core = SERCOM1_GCLK_ID_CORE;
664677
clk_slow = SERCOM1_GCLK_ID_SLOW;
665-
IdNvic = SERCOM1_0_IRQn;
678+
679+
NVIC_ClearPendingIRQ(SERCOM1_0_IRQn);
680+
NVIC_ClearPendingIRQ(SERCOM1_1_IRQn);
681+
NVIC_ClearPendingIRQ(SERCOM1_2_IRQn);
682+
NVIC_ClearPendingIRQ(SERCOM1_3_IRQn);
683+
684+
NVIC_SetPriority (SERCOM1_0_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority */
685+
NVIC_SetPriority (SERCOM1_1_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
686+
NVIC_SetPriority (SERCOM1_2_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
687+
NVIC_SetPriority (SERCOM1_3_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
688+
689+
NVIC_EnableIRQ(SERCOM1_0_IRQn);
690+
NVIC_EnableIRQ(SERCOM1_1_IRQn);
691+
NVIC_EnableIRQ(SERCOM1_2_IRQn);
692+
NVIC_EnableIRQ(SERCOM1_3_IRQn);
666693
}
667694
else if(sercom == SERCOM2)
668695
{
669696
clk_core = SERCOM2_GCLK_ID_CORE;
670697
clk_slow = SERCOM2_GCLK_ID_SLOW;
671-
IdNvic = SERCOM2_2_IRQn;
698+
699+
NVIC_ClearPendingIRQ(SERCOM2_0_IRQn);
700+
NVIC_ClearPendingIRQ(SERCOM2_1_IRQn);
701+
NVIC_ClearPendingIRQ(SERCOM2_2_IRQn);
702+
NVIC_ClearPendingIRQ(SERCOM2_3_IRQn);
703+
704+
NVIC_SetPriority (SERCOM2_0_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority */
705+
NVIC_SetPriority (SERCOM2_1_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
706+
NVIC_SetPriority (SERCOM2_2_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
707+
NVIC_SetPriority (SERCOM2_3_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
708+
709+
NVIC_EnableIRQ(SERCOM2_0_IRQn);
710+
NVIC_EnableIRQ(SERCOM2_1_IRQn);
711+
NVIC_EnableIRQ(SERCOM2_2_IRQn);
712+
NVIC_EnableIRQ(SERCOM2_3_IRQn);
672713
}
673714
else if(sercom == SERCOM3)
674715
{
675716
clk_core = SERCOM3_GCLK_ID_CORE;
676717
clk_slow = SERCOM3_GCLK_ID_SLOW;
677-
IdNvic = SERCOM3_0_IRQn;
718+
719+
NVIC_ClearPendingIRQ(SERCOM3_0_IRQn);
720+
NVIC_ClearPendingIRQ(SERCOM3_1_IRQn);
721+
NVIC_ClearPendingIRQ(SERCOM3_2_IRQn);
722+
NVIC_ClearPendingIRQ(SERCOM3_3_IRQn);
723+
724+
NVIC_SetPriority (SERCOM3_0_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority */
725+
NVIC_SetPriority (SERCOM3_1_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
726+
NVIC_SetPriority (SERCOM3_2_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
727+
NVIC_SetPriority (SERCOM3_3_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
728+
729+
NVIC_EnableIRQ(SERCOM3_0_IRQn);
730+
NVIC_EnableIRQ(SERCOM3_1_IRQn);
731+
NVIC_EnableIRQ(SERCOM3_2_IRQn);
732+
NVIC_EnableIRQ(SERCOM3_3_IRQn);
678733
}
679734
else if(sercom == SERCOM4)
680735
{
681736
clk_core = SERCOM4_GCLK_ID_CORE;
682737
clk_slow = SERCOM4_GCLK_ID_SLOW;
683-
IdNvic = SERCOM4_0_IRQn;
738+
739+
NVIC_ClearPendingIRQ(SERCOM4_0_IRQn);
740+
NVIC_ClearPendingIRQ(SERCOM4_1_IRQn);
741+
NVIC_ClearPendingIRQ(SERCOM4_2_IRQn);
742+
NVIC_ClearPendingIRQ(SERCOM4_3_IRQn);
743+
744+
NVIC_SetPriority (SERCOM4_0_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority */
745+
NVIC_SetPriority (SERCOM4_1_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
746+
NVIC_SetPriority (SERCOM4_2_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
747+
NVIC_SetPriority (SERCOM4_3_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
748+
749+
NVIC_EnableIRQ(SERCOM4_0_IRQn);
750+
NVIC_EnableIRQ(SERCOM4_1_IRQn);
751+
NVIC_EnableIRQ(SERCOM4_2_IRQn);
752+
NVIC_EnableIRQ(SERCOM4_3_IRQn);
684753
}
685754
else if(sercom == SERCOM5)
686755
{
687756
clk_core = SERCOM5_GCLK_ID_CORE;
688757
clk_slow = SERCOM5_GCLK_ID_SLOW;
689-
IdNvic = SERCOM5_0_IRQn;
690-
}
691758

692-
if ( IdNvic == PendSV_IRQn )
693-
{
694-
// We got a problem here
695-
return ;
759+
NVIC_ClearPendingIRQ(SERCOM5_0_IRQn);
760+
NVIC_ClearPendingIRQ(SERCOM5_1_IRQn);
761+
NVIC_ClearPendingIRQ(SERCOM5_2_IRQn);
762+
NVIC_ClearPendingIRQ(SERCOM5_3_IRQn);
763+
764+
NVIC_SetPriority (SERCOM5_0_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority */
765+
NVIC_SetPriority (SERCOM5_1_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
766+
NVIC_SetPriority (SERCOM5_2_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
767+
NVIC_SetPriority (SERCOM5_3_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
768+
769+
NVIC_EnableIRQ(SERCOM5_0_IRQn);
770+
NVIC_EnableIRQ(SERCOM5_1_IRQn);
771+
NVIC_EnableIRQ(SERCOM5_2_IRQn);
772+
NVIC_EnableIRQ(SERCOM5_3_IRQn);
696773
}
697774
#else
698775

776+
IRQn_Type IdNvic=PendSV_IRQn ; // Dummy init to intercept potential error later
777+
699778
uint8_t clockId = 0;
700779
if(sercom == SERCOM0)
701780
{
@@ -735,16 +814,16 @@ void SERCOM::initClockNVIC( void )
735814
}
736815
#endif
737816

738-
// Setting NVIC
739-
NVIC_ClearPendingIRQ(IdNvic);
740-
NVIC_SetPriority (IdNvic, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority */
741-
NVIC_EnableIRQ(IdNvic);
742-
743817
#if defined(__SAMD51__)
744818
GCLK->PCHCTRL[clk_core].reg = GCLK_PCHCTRL_GEN_GCLK1_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
745819
GCLK->PCHCTRL[clk_slow].reg = GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
746820

747821
#else
822+
// Setting NVIC
823+
NVIC_ClearPendingIRQ(IdNvic);
824+
NVIC_SetPriority (IdNvic, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority */
825+
NVIC_EnableIRQ(IdNvic);
826+
748827
//Setting clock
749828
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID( clockId ) | // Generic Clock 0 (SERCOMx)
750829
GCLK_CLKCTRL_GEN_GCLK0 | // Generic Clock Generator 0 is source

‎variants/metro_m4/variant.cpp

Lines changed: 13 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -186,8 +186,19 @@ SERCOM sercom5( SERCOM5 ) ;
186186

187187
Uart Serial1( &sercom3, PIN_SERIAL1_RX, PIN_SERIAL1_TX, PAD_SERIAL1_RX, PAD_SERIAL1_TX ) ;
188188

189-
void SERCOM1_2_Handler()
189+
void SERCOM3_0_Handler()
190+
{
191+
Serial1.IrqHandler();
192+
}
193+
void SERCOM3_1_Handler()
194+
{
195+
Serial1.IrqHandler();
196+
}
197+
void SERCOM3_2_Handler()
198+
{
199+
Serial1.IrqHandler();
200+
}
201+
void SERCOM3_3_Handler()
190202
{
191203
Serial1.IrqHandler();
192204
}
193-

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