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adybag14-cyber merged 1 commit into from
Mar 20, 2026
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feat(fs5.5): add e1000 tcp transport proof #71

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4 changes: 4 additions & 0 deletions .github/workflows/release-preview.yml
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Expand Up @@ -211,6 +211,10 @@ jobs:
shell: pwsh
run: ./scripts/baremetal-qemu-e1000-udp-probe-check.ps1

- name: Bare-metal QEMU E1000 TCP probe (optional)
shell: pwsh
run: ./scripts/baremetal-qemu-e1000-tcp-probe-check.ps1

- name: Bare-metal QEMU RTL8139 ARP probe (optional)
shell: pwsh
run: ./scripts/baremetal-qemu-rtl8139-arp-probe-check.ps1
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4 changes: 4 additions & 0 deletions .github/workflows/zig-ci.yml
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Expand Up @@ -185,6 +185,10 @@ jobs:
shell: pwsh
run: ./scripts/baremetal-qemu-e1000-udp-probe-check.ps1

- name: Bare-metal QEMU E1000 TCP probe (optional)
shell: pwsh
run: ./scripts/baremetal-qemu-e1000-tcp-probe-check.ps1

- name: Bare-metal QEMU RTL8139 ARP probe (optional)
shell: pwsh
run: ./scripts/baremetal-qemu-rtl8139-arp-probe-check.ps1
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6 changes: 3 additions & 3 deletions README.md
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Expand Up @@ -66,9 +66,9 @@ ZAR-Zig-Agent-Runtime is the Zig runtime port of OpenClaw, with parity-first del
- host regressions in `src/baremetal/e1000.zig`, `src/baremetal/pci.zig`, and `src/baremetal_main.zig` now prove init, MAC readout, TX, RX, and export-surface stability on the clean-room `E1000` path
- `scripts/baremetal-qemu-e1000-probe-check.ps1` plus `scripts/qemu-e1000-dgram-echo.ps1` now prove live QEMU `E1000` PCI bind, MAC readout, TX, RX, payload validation, and counter advance over the freestanding PVH artifact
- `src/pal/net.zig` now routes the same raw-frame PAL seam through selectable `RTL8139` and `E1000` backends without regressing the existing RTL8139 path
- host regressions in `src/baremetal/e1000.zig`, `src/baremetal/pci.zig`, and `src/baremetal_main.zig` now also prove `ARP`, `IPv4`, and `UDP` reuse on the clean-room `E1000` path
- `scripts/baremetal-qemu-e1000-arp-probe-check.ps1`, `scripts/baremetal-qemu-e1000-ipv4-probe-check.ps1`, and `scripts/baremetal-qemu-e1000-udp-probe-check.ps1` now prove live QEMU `E1000` ARP request transmission, IPv4 frame encode/decode, UDP datagram encode/decode, and TX/RX counter advance over the freestanding PVH artifact
- `TCP` / `HTTP` / `HTTPS` reuse over `E1000` remains future depth
- host regressions in `src/baremetal/e1000.zig`, `src/baremetal/pci.zig`, `src/pal/net.zig`, and `src/baremetal_main.zig` now also prove `ARP`, `IPv4`, `UDP`, and bounded `TCP` reuse on the clean-room `E1000` path
- `scripts/baremetal-qemu-e1000-arp-probe-check.ps1`, `scripts/baremetal-qemu-e1000-ipv4-probe-check.ps1`, `scripts/baremetal-qemu-e1000-udp-probe-check.ps1`, and `scripts/baremetal-qemu-e1000-tcp-probe-check.ps1` now prove live QEMU `E1000` ARP request transmission, IPv4 frame encode/decode, UDP datagram encode/decode, bounded TCP handshake/payload/teardown, and TX/RX counter advance over the freestanding PVH artifact
- `HTTP` / `HTTPS` reuse over `E1000` remains future depth
- keyboard/mouse is now strict-closed in [`docs/zig-port/FS5_5_HARDWARE_DRIVERS_SYSTEMS.md`](docs/zig-port/FS5_5_HARDWARE_DRIVERS_SYSTEMS.md)
- `src/baremetal/ps2_input.zig` now contains a real x86 port-I/O backed PS/2 controller path
- `scripts/baremetal-qemu-ps2-input-probe-check.ps1` proves IRQ-driven keyboard/mouse state updates against the freestanding PVH artifact
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2 changes: 2 additions & 0 deletions build.zig
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Expand Up @@ -14,6 +14,7 @@ pub fn build(b: *std.Build) void {
const baremetal_e1000_arp_probe = b.option(bool, "baremetal-e1000-arp-probe", "Enable the E1000 ARP validation path in the freestanding image") orelse false;
const baremetal_e1000_ipv4_probe = b.option(bool, "baremetal-e1000-ipv4-probe", "Enable the E1000 IPv4 validation path in the freestanding image") orelse false;
const baremetal_e1000_udp_probe = b.option(bool, "baremetal-e1000-udp-probe", "Enable the E1000 UDP validation path in the freestanding image") orelse false;
const baremetal_e1000_tcp_probe = b.option(bool, "baremetal-e1000-tcp-probe", "Enable the E1000 TCP validation path in the freestanding image") orelse false;
const baremetal_rtl8139_probe = b.option(bool, "baremetal-rtl8139-probe", "Enable the RTL8139 Ethernet validation path in the freestanding image") orelse false;
const baremetal_rtl8139_arp_probe = b.option(bool, "baremetal-rtl8139-arp-probe", "Enable the RTL8139 ARP validation path in the freestanding image") orelse false;
const baremetal_rtl8139_ipv4_probe = b.option(bool, "baremetal-rtl8139-ipv4-probe", "Enable the RTL8139 IPv4 validation path in the freestanding image") orelse false;
Expand Down Expand Up @@ -110,6 +111,7 @@ pub fn build(b: *std.Build) void {
baremetal_options.addOption(bool, "e1000_arp_probe", baremetal_e1000_arp_probe);
baremetal_options.addOption(bool, "e1000_ipv4_probe", baremetal_e1000_ipv4_probe);
baremetal_options.addOption(bool, "e1000_udp_probe", baremetal_e1000_udp_probe);
baremetal_options.addOption(bool, "e1000_tcp_probe", baremetal_e1000_tcp_probe);
baremetal_options.addOption(bool, "rtl8139_probe", baremetal_rtl8139_probe);
baremetal_options.addOption(bool, "rtl8139_arp_probe", baremetal_rtl8139_arp_probe);
baremetal_options.addOption(bool, "rtl8139_ipv4_probe", baremetal_rtl8139_ipv4_probe);
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16 changes: 8 additions & 8 deletions docs/zig-port/FS5_5_HARDWARE_DRIVERS_SYSTEMS.md
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Expand Up @@ -40,14 +40,14 @@ Tracked docs:
Delivered first adoption slice:

- clean-room `E1000` NIC support
- first strict delivery now includes raw-frame/L2 plus `ARP`, `IPv4`, and `UDP`
- first strict delivery now includes raw-frame/L2 plus `ARP`, `IPv4`, `UDP`, and bounded `TCP`
- `src/baremetal/e1000.zig` now provides a ZAR-owned `82540EM`-class driver with PCI bind, MMIO + legacy I/O reset, EEPROM MAC readout, bounded TX/RX rings, and raw-frame send/receive telemetry
- `src/baremetal/pci.zig` now discovers the `E1000` MMIO + I/O BAR pair and enables I/O, memory, and bus-master decode on the selected function
- host regressions now prove init, MAC readout, TX, RX, export-surface stability, and `ARP` / `IPv4` / `UDP` protocol reuse on the clean-room `E1000` path
- host regressions now prove init, MAC readout, TX, RX, export-surface stability, and `ARP` / `IPv4` / `UDP` / bounded `TCP` protocol reuse on the clean-room `E1000` path
- `scripts/baremetal-qemu-e1000-probe-check.ps1` plus `scripts/qemu-e1000-dgram-echo.ps1` now prove live QEMU `E1000` PCI bind, MAC readout, TX, RX, payload validation, and counter advance over the freestanding PVH artifact
- `src/pal/net.zig` now routes the same raw-frame PAL seam through selectable `RTL8139` and `E1000` backends without regressing the existing RTL8139 path
- `scripts/baremetal-qemu-e1000-arp-probe-check.ps1`, `scripts/baremetal-qemu-e1000-ipv4-probe-check.ps1`, and `scripts/baremetal-qemu-e1000-udp-probe-check.ps1` now prove live QEMU `E1000` ARP request transmission, IPv4 frame encode/decode, UDP datagram encode/decode, and TX/RX counter advance over the freestanding PVH artifact
- `TCP` / `HTTP` / `HTTPS` reuse over `E1000` remains the next depth step
- `scripts/baremetal-qemu-e1000-arp-probe-check.ps1`, `scripts/baremetal-qemu-e1000-ipv4-probe-check.ps1`, `scripts/baremetal-qemu-e1000-udp-probe-check.ps1`, and `scripts/baremetal-qemu-e1000-tcp-probe-check.ps1` now prove live QEMU `E1000` ARP request transmission, IPv4 frame encode/decode, UDP datagram encode/decode, bounded TCP handshake/payload/teardown, and TX/RX counter advance over the freestanding PVH artifact
- `HTTP` / `HTTPS` reuse over `E1000` remains the next depth step
- do not widen scope to VFS/ELF/syscalls/userspace in this slice

`FS5.5` is not complete until each subsystem has:
Expand Down Expand Up @@ -372,12 +372,12 @@ Current local source-of-truth evidence:
- `oc_ethernet_rx_len`
- `src/pal/net.zig` now exposes the bare-metal raw-frame PAL seam through the same RTL8139 driver path instead of a fake transport
- host regressions now prove mock-device initialization, raw-frame send, receive, ABI export, and PAL bridging
- a second clean-room NIC family now exists for future depth:
- a second clean-room NIC family now exists for broader FS5.5 depth:
- `src/baremetal/e1000.zig` now provides a ZAR-owned `82540EM`-class `E1000` path with PCI bind, MMIO + legacy I/O reset, EEPROM MAC readout, bounded TX/RX rings, and raw-frame send/receive telemetry
- `src/baremetal/pci.zig` now also discovers the `E1000` MMIO + I/O BAR pair and enables I/O, memory, and bus-master decode on the selected PCI function
- dedicated host regressions prove init, MAC readout, TX, RX, and export-surface stability on the clean-room `E1000` path
- `scripts/baremetal-qemu-e1000-probe-check.ps1` plus `scripts/qemu-e1000-dgram-echo.ps1` now prove live QEMU `E1000` PCI bind, MAC readout, TX, RX, payload validation, and counter advance over the freestanding PVH artifact
- the current strict delivery on `E1000` is raw-frame `L2` only; protocol/service reuse over `E1000` remains future depth
- dedicated host regressions prove init, MAC readout, TX, RX, export-surface stability, and bounded `TCP` reuse on the clean-room `E1000` path
- `scripts/baremetal-qemu-e1000-probe-check.ps1`, `scripts/baremetal-qemu-e1000-arp-probe-check.ps1`, `scripts/baremetal-qemu-e1000-ipv4-probe-check.ps1`, `scripts/baremetal-qemu-e1000-udp-probe-check.ps1`, and `scripts/baremetal-qemu-e1000-tcp-probe-check.ps1` now prove live QEMU `E1000` raw-frame, `ARP`, `IPv4`, `UDP`, and bounded `TCP` transport behavior over the freestanding PVH artifact
- `HTTP` / `HTTPS` and higher service reuse over `E1000` remain future depth
- the live freestanding/QEMU proof is now green:
- `scripts/baremetal-qemu-rtl8139-probe-check.ps1`
- MAC readout succeeds
Expand Down
6 changes: 3 additions & 3 deletions docs/zig-port/PHASE_CHECKLIST.md
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Expand Up @@ -12,9 +12,9 @@ Registry status:
- ZigOS reference-only integration planning is now tracked in:
- `docs/zig-port/ZAR_VS_ZIGOS_INTEGRATION_PLAN.md`
- `docs/zig-port/ZAR_VS_ZIGOS_E1000_SLICE_PLAN.md`
- first delivered adoption slice is clean-room `E1000` protocol reuse through `ARP` / `IPv4` / `UDP`, not direct VFS/userspace import.
- the clean-room `E1000` slice now ships `src/baremetal/e1000.zig`, `src/baremetal/pci.zig` discovery + decode enablement, `src/pal/net.zig` backend selection across `RTL8139` + `E1000`, host regressions for init/MAC/TX/RX/export state plus `ARP` / `IPv4` / `UDP`, and the live QEMU proofs `scripts/baremetal-qemu-e1000-probe-check.ps1`, `scripts/baremetal-qemu-e1000-arp-probe-check.ps1`, `scripts/baremetal-qemu-e1000-ipv4-probe-check.ps1`, and `scripts/baremetal-qemu-e1000-udp-probe-check.ps1` on top of `scripts/qemu-e1000-dgram-echo.ps1`.
- `TCP` / `HTTP` / `HTTPS` reuse over `E1000` remains future depth.
- first delivered adoption slice is clean-room `E1000` protocol reuse through `ARP` / `IPv4` / `UDP` / bounded `TCP`, not direct VFS/userspace import.
- the clean-room `E1000` slice now ships `src/baremetal/e1000.zig`, `src/baremetal/pci.zig` discovery + decode enablement, `src/pal/net.zig` backend selection across `RTL8139` + `E1000`, host regressions for init/MAC/TX/RX/export state plus `ARP` / `IPv4` / `UDP` / bounded `TCP`, and the live QEMU proofs `scripts/baremetal-qemu-e1000-probe-check.ps1`, `scripts/baremetal-qemu-e1000-arp-probe-check.ps1`, `scripts/baremetal-qemu-e1000-ipv4-probe-check.ps1`, `scripts/baremetal-qemu-e1000-udp-probe-check.ps1`, and `scripts/baremetal-qemu-e1000-tcp-probe-check.ps1` on top of `scripts/qemu-e1000-dgram-echo.ps1`.
- `HTTP` / `HTTPS` reuse over `E1000` remains future depth.
- `FS5.5` framebuffer/console strict closure is now reached locally: `src/baremetal/framebuffer_console.zig` programs a real Bochs/QEMU BGA linear-framebuffer path with bounded mode support for `640x400`, `800x600`, `1024x768`, `1280x720`, and `1280x1024`, `src/baremetal/pci.zig` discovers the selected PCI display adapter as structured metadata, exposes the framebuffer BAR, and enables decode on that function, `src/baremetal/edid.zig`, `src/baremetal/display_output.zig`, and `src/baremetal/virtio_gpu.zig` now add the first real EDID-backed controller path over `virtio-gpu-pci` including exported capability flags for digital input, preferred timing, CEA, DisplayID, HDMI-vendor-data, and basic-audio metadata when present plus EDID-derived connector inference, bounded per-output entry export, and bounded resource-create/attach/set-scanout/flush behavior, `src/pal/framebuffer.zig` exposes the surface plus supported-mode enumeration and display-output state through the PAL, host regressions in `src/baremetal/framebuffer_console.zig`, `src/baremetal/virtio_gpu.zig`, `src/baremetal_main.zig`, and `src/baremetal/display_output.zig` prove framebuffer state, display-output state, adapter metadata, supported-mode enumeration, glyph pixel updates, bounded mode switching, present counters, non-zero scanout pixels, connector inference from EDID capability flags, and the output-entry table, and the live QEMU+GDB proofs `scripts/baremetal-qemu-framebuffer-console-probe-check.ps1` and `scripts/baremetal-qemu-virtio-gpu-display-probe-check.ps1` now read back real MMIO banner pixels plus BGA adapter metadata and real `virtio-gpu-pci` EDID/controller capability state with non-zero scanout pixels and validated output-entry metadata over the freestanding PVH artifact; real HDMI/DisplayPort connector-specific scanout paths remain future depth and are not claimed here.
- Latest FS5.5 display connector activation slice: `src/baremetal/display_output.zig` now retargets the exported active output from bounded per-output entries, `src/baremetal/tool_exec.zig` now exposes `display-activate <connector>` and uses connector-targeted activation in launch profiles, `src/baremetal/tool_service.zig` now exposes typed `DISPLAYACTIVATE`, host/module validation proves successful activation of the connected connector plus explicit mismatched-connector rejection, and `scripts/baremetal-qemu-virtio-gpu-display-probe-check.ps1` now proves the same success/rejection behavior on the live `virtio-gpu-pci` controller path.
- Latest FS5.5 display output mode slice: `src/baremetal/display_output.zig` and `src/baremetal/virtio_gpu.zig` now support explicit per-output mode retargeting on the real `virtio-gpu-pci` path, `src/pal/framebuffer.zig` and `src/baremetal_main.zig` expose that same bounded control through the PAL and `oc_display_output_set`, `src/baremetal/tool_exec.zig` now exposes `display-output-set <index> <width> <height>`, `src/baremetal/tool_service.zig` now exposes typed `DISPLAYOUTPUTSET`, host/module validation proves the connected output can be driven to `1024x768` while oversized requests are rejected without corrupting the exported state, and `scripts/baremetal-qemu-virtio-gpu-display-probe-check.ps1` now proves the same explicit output-index mode change on the live controller path.
Expand Down
8 changes: 4 additions & 4 deletions docs/zig-port/PORT_PLAN.md
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Expand Up @@ -14,14 +14,14 @@ Full-stack replacement execution reference:
- `docs/zig-port/ZAR_VS_ZIGOS_INTEGRATION_PLAN.md`
- `docs/zig-port/ZAR_VS_ZIGOS_E1000_SLICE_PLAN.md`
- current hard boundary: no ZigOS source import until upstream licensing is explicit
- first delivered adoption slice is clean-room `E1000` protocol reuse through `ARP` / `IPv4` / `UDP`, because it expands hardware breadth without forcing a VFS/ELF/syscall redesign
- first delivered adoption slice is clean-room `E1000` protocol reuse through `ARP` / `IPv4` / `UDP` / bounded `TCP`, because it expands hardware breadth without forcing a VFS/ELF/syscall redesign
- `src/baremetal/e1000.zig` now provides the first ZAR-owned `82540EM`-class `E1000` path with PCI bind, MMIO + legacy I/O reset, EEPROM MAC readout, bounded TX/RX rings, and raw-frame send/receive telemetry
- `src/baremetal/pci.zig` now discovers the `E1000` MMIO + I/O BAR pair and enables I/O, memory, and bus-master decode on the selected PCI function
- host regressions now prove init, MAC readout, TX, RX, export-surface stability, and `ARP` / `IPv4` / `UDP` protocol reuse on the clean-room `E1000` path
- host regressions now prove init, MAC readout, TX, RX, export-surface stability, and `ARP` / `IPv4` / `UDP` / bounded `TCP` protocol reuse on the clean-room `E1000` path
- `scripts/baremetal-qemu-e1000-probe-check.ps1` plus `scripts/qemu-e1000-dgram-echo.ps1` now prove live QEMU `E1000` PCI bind, MAC readout, TX, RX, payload validation, and counter advance over the freestanding PVH artifact
- `src/pal/net.zig` now routes the same raw-frame PAL seam through selectable `RTL8139` and `E1000` backends without regressing the existing RTL8139 path
- `scripts/baremetal-qemu-e1000-arp-probe-check.ps1`, `scripts/baremetal-qemu-e1000-ipv4-probe-check.ps1`, and `scripts/baremetal-qemu-e1000-udp-probe-check.ps1` now prove live QEMU `E1000` ARP request transmission, IPv4 frame encode/decode, UDP datagram encode/decode, and TX/RX counter advance over the freestanding PVH artifact
- `TCP` / `HTTP` / `HTTPS` reuse over `E1000` remains the next depth step
- `scripts/baremetal-qemu-e1000-arp-probe-check.ps1`, `scripts/baremetal-qemu-e1000-ipv4-probe-check.ps1`, `scripts/baremetal-qemu-e1000-udp-probe-check.ps1`, and `scripts/baremetal-qemu-e1000-tcp-probe-check.ps1` now prove live QEMU `E1000` ARP request transmission, IPv4 frame encode/decode, UDP datagram encode/decode, bounded TCP handshake/payload/teardown, and TX/RX counter advance over the freestanding PVH artifact
- `HTTP` / `HTTPS` reuse over `E1000` remains the next depth step
- `FS5.5` hardware-driver pivot update:
- framebuffer/console strict closure is now reached locally.
- real linear-framebuffer path shipped in `src/baremetal/framebuffer_console.zig`:
Expand Down
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