[sw-sysemu] Fix rvtimer write_mtimecmp immediate interrupt raise #66
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When mtimecmp is written to a value already in the past (mtime >= mtimecmp) and the interrupt was not previously asserted, raise the timer interrupt immediately. This mirrors hardware behavior where the comparator fires as soon as the condition is met. If the interrupt was already asserted (MIP bit already set), no action is needed — the hart already has a pending interrupt. Without this fix, tickless kernels that write mtimecmp to a nearly-passed value can deadlock: the internal interrupt flag is set but the hart MIP bit is never updated, so the ISR never fires and no subsequent write_mtimecmp call is made.
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Good catch! (And yes, this does match rtl, took a while to untangle). Could you a add a minimal test case (we have a few in `tests/erbium/)? |
Of course! |
AFOliveira
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Done. |
AFOliveira
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Force-pushing to fix the copyright date dismissed the CI flow |
From DV point of view I think this is change is fine! |
3 participants
When mtimecmp is written to a value already in the past (mtime >= mtimecmp) and the interrupt was not previously asserted, raise the timer interrupt immediately. This mirrors hardware behavior where the comparator fires as soon as the condition is met.
If the interrupt was already asserted (MIP bit already set), no action is needed as the hart already has a pending interrupt.
Without this fix, tickless kernels that write mtimecmp to a nearly-passed value can deadlock: the internal interrupt flag is set but the hart MIP bit is never updated, so the ISR never fires and no subsequent write_mtimecmp call is made.