Skip to content

Commit d8a7f9f

Browse files
committed
Rename ports
1 parent 5ec6599 commit d8a7f9f

14 files changed

+488
-488
lines changed

rtl/i2c_init.v

Lines changed: 87 additions & 87 deletions
Original file line numberDiff line numberDiff line change
@@ -36,19 +36,19 @@ module i2c_init (
3636
/*
3737
* I2C master interface
3838
*/
39-
output wire [6:0] cmd_address,
40-
output wire cmd_start,
41-
output wire cmd_read,
42-
output wire cmd_write,
43-
output wire cmd_write_multiple,
44-
output wire cmd_stop,
45-
output wire cmd_valid,
46-
input wire cmd_ready,
47-
48-
output wire [7:0] data_out,
49-
output wire data_out_valid,
50-
input wire data_out_ready,
51-
output wire data_out_last,
39+
output wire [6:0] m_axis_cmd_address,
40+
output wire m_axis_cmd_start,
41+
output wire m_axis_cmd_read,
42+
output wire m_axis_cmd_write,
43+
output wire m_axis_cmd_write_multiple,
44+
output wire m_axis_cmd_stop,
45+
output wire m_axis_cmd_valid,
46+
input wire m_axis_cmd_ready,
47+
48+
output wire [7:0] m_axis_data_tdata,
49+
output wire m_axis_data_tvalid,
50+
input wire m_axis_data_tready,
51+
output wire m_axis_data_tlast,
5252

5353
/*
5454
* Status
@@ -184,30 +184,30 @@ reg [AW-1:0] data_ptr_reg = {AW{1'b0}}, data_ptr_next;
184184

185185
reg [6:0] cur_address_reg = 7'd0, cur_address_next;
186186

187-
reg [6:0] cmd_address_reg = 7'd0, cmd_address_next;
188-
reg cmd_start_reg = 1'b0, cmd_start_next;
189-
reg cmd_write_reg = 1'b0, cmd_write_next;
190-
reg cmd_stop_reg = 1'b0, cmd_stop_next;
191-
reg cmd_valid_reg = 1'b0, cmd_valid_next;
187+
reg [6:0] m_axis_cmd_address_reg = 7'd0, m_axis_cmd_address_next;
188+
reg m_axis_cmd_start_reg = 1'b0, m_axis_cmd_start_next;
189+
reg m_axis_cmd_write_reg = 1'b0, m_axis_cmd_write_next;
190+
reg m_axis_cmd_stop_reg = 1'b0, m_axis_cmd_stop_next;
191+
reg m_axis_cmd_valid_reg = 1'b0, m_axis_cmd_valid_next;
192192

193-
reg [7:0] data_out_reg = 8'd0, data_out_next;
194-
reg data_out_valid_reg = 1'b0, data_out_valid_next;
193+
reg [7:0] m_axis_data_tdata_reg = 8'd0, m_axis_data_tdata_next;
194+
reg m_axis_data_tvalid_reg = 1'b0, m_axis_data_tvalid_next;
195195

196196
reg start_flag_reg = 1'b0, start_flag_next;
197197

198198
reg busy_reg = 1'b0;
199199

200-
assign cmd_address = cmd_address_reg;
201-
assign cmd_start = cmd_start_reg;
202-
assign cmd_read = 1'b0;
203-
assign cmd_write = cmd_write_reg;
204-
assign cmd_write_multiple = 1'b0;
205-
assign cmd_stop = cmd_stop_reg;
206-
assign cmd_valid = cmd_valid_reg;
200+
assign m_axis_cmd_address = m_axis_cmd_address_reg;
201+
assign m_axis_cmd_start = m_axis_cmd_start_reg;
202+
assign m_axis_cmd_read = 1'b0;
203+
assign m_axis_cmd_write = m_axis_cmd_write_reg;
204+
assign m_axis_cmd_write_multiple = 1'b0;
205+
assign m_axis_cmd_stop = m_axis_cmd_stop_reg;
206+
assign m_axis_cmd_valid = m_axis_cmd_valid_reg;
207207

208-
assign data_out = data_out_reg;
209-
assign data_out_valid = data_out_valid_reg;
210-
assign data_out_last = 1'b1;
208+
assign m_axis_data_tdata = m_axis_data_tdata_reg;
209+
assign m_axis_data_tvalid = m_axis_data_tvalid_reg;
210+
assign m_axis_data_tlast = 1'b1;
211211

212212
assign busy = busy_reg;
213213

@@ -220,18 +220,18 @@ always @* begin
220220

221221
cur_address_next = cur_address_reg;
222222

223-
cmd_address_next = cmd_address_reg;
224-
cmd_start_next = cmd_start_reg & ~(cmd_valid & cmd_ready);
225-
cmd_write_next = cmd_write_reg & ~(cmd_valid & cmd_ready);
226-
cmd_stop_next = cmd_stop_reg & ~(cmd_valid & cmd_ready);
227-
cmd_valid_next = cmd_valid_reg & ~cmd_ready;
223+
m_axis_cmd_address_next = m_axis_cmd_address_reg;
224+
m_axis_cmd_start_next = m_axis_cmd_start_reg & ~(m_axis_cmd_valid & m_axis_cmd_ready);
225+
m_axis_cmd_write_next = m_axis_cmd_write_reg & ~(m_axis_cmd_valid & m_axis_cmd_ready);
226+
m_axis_cmd_stop_next = m_axis_cmd_stop_reg & ~(m_axis_cmd_valid & m_axis_cmd_ready);
227+
m_axis_cmd_valid_next = m_axis_cmd_valid_reg & ~m_axis_cmd_ready;
228228

229-
data_out_next = data_out_reg;
230-
data_out_valid_next = data_out_valid_reg & ~data_out_ready;
229+
m_axis_data_tdata_next = m_axis_data_tdata_reg;
230+
m_axis_data_tvalid_next = m_axis_data_tvalid_reg & ~m_axis_data_tready;
231231

232232
start_flag_next = start_flag_reg;
233233

234-
if (cmd_valid | data_out_valid) begin
234+
if (m_axis_cmd_valid | m_axis_data_tvalid) begin
235235
// wait for output registers to clear
236236
state_next = state_reg;
237237
end else begin
@@ -250,30 +250,30 @@ always @* begin
250250
// process commands
251251
if (init_data_reg[8] == 1'b1) begin
252252
// write data
253-
cmd_write_next = 1'b1;
254-
cmd_stop_next = 1'b0;
255-
cmd_valid_next = 1'b1;
253+
m_axis_cmd_write_next = 1'b1;
254+
m_axis_cmd_stop_next = 1'b0;
255+
m_axis_cmd_valid_next = 1'b1;
256256

257-
data_out_next = init_data_reg[7:0];
258-
data_out_valid_next = 1'b1;
257+
m_axis_data_tdata_next = init_data_reg[7:0];
258+
m_axis_data_tvalid_next = 1'b1;
259259

260260
address_next = address_reg + 1;
261261

262262
state_next = STATE_RUN;
263263
end else if (init_data_reg[8:7] == 2'b01) begin
264264
// write address
265-
cmd_address_next = init_data_reg[6:0];
266-
cmd_start_next = 1'b1;
265+
m_axis_cmd_address_next = init_data_reg[6:0];
266+
m_axis_cmd_start_next = 1'b1;
267267

268268
address_next = address_reg + 1;
269269

270270
state_next = STATE_RUN;
271271
end else if (init_data_reg == 9'b001000001) begin
272272
// send stop
273-
cmd_write_next = 1'b0;
274-
cmd_start_next = 1'b0;
275-
cmd_stop_next = 1'b1;
276-
cmd_valid_next = 1'b1;
273+
m_axis_cmd_write_next = 1'b0;
274+
m_axis_cmd_start_next = 1'b0;
275+
m_axis_cmd_stop_next = 1'b1;
276+
m_axis_cmd_valid_next = 1'b1;
277277

278278
address_next = address_reg + 1;
279279

@@ -285,10 +285,10 @@ always @* begin
285285
state_next = STATE_TABLE_1;
286286
end else if (init_data_reg == 9'd0) begin
287287
// stop
288-
cmd_start_next = 1'b0;
289-
cmd_write_next = 1'b0;
290-
cmd_stop_next = 1'b1;
291-
cmd_valid_next = 1'b1;
288+
m_axis_cmd_start_next = 1'b0;
289+
m_axis_cmd_write_next = 1'b0;
290+
m_axis_cmd_stop_next = 1'b1;
291+
m_axis_cmd_valid_next = 1'b1;
292292

293293
state_next = STATE_IDLE;
294294
end else begin
@@ -315,10 +315,10 @@ always @* begin
315315
state_next = STATE_RUN;
316316
end else if (init_data_reg == 9'd0) begin
317317
// stop
318-
cmd_start_next = 1'b0;
319-
cmd_write_next = 1'b0;
320-
cmd_stop_next = 1'b1;
321-
cmd_valid_next = 1'b1;
318+
m_axis_cmd_start_next = 1'b0;
319+
m_axis_cmd_write_next = 1'b0;
320+
m_axis_cmd_stop_next = 1'b1;
321+
m_axis_cmd_valid_next = 1'b1;
322322

323323
state_next = STATE_IDLE;
324324
end else begin
@@ -347,10 +347,10 @@ always @* begin
347347
state_next = STATE_RUN;
348348
end else if (init_data_reg == 9'd0) begin
349349
// stop
350-
cmd_start_next = 1'b0;
351-
cmd_write_next = 1'b0;
352-
cmd_stop_next = 1'b1;
353-
cmd_valid_next = 1'b1;
350+
m_axis_cmd_start_next = 1'b0;
351+
m_axis_cmd_write_next = 1'b0;
352+
m_axis_cmd_stop_next = 1'b1;
353+
m_axis_cmd_valid_next = 1'b1;
354354

355355
state_next = STATE_IDLE;
356356
end else begin
@@ -363,38 +363,38 @@ always @* begin
363363
// process data table with selected address
364364
if (init_data_reg[8] == 1'b1) begin
365365
// write data
366-
cmd_write_next = 1'b1;
367-
cmd_stop_next = 1'b0;
368-
cmd_valid_next = 1'b1;
366+
m_axis_cmd_write_next = 1'b1;
367+
m_axis_cmd_stop_next = 1'b0;
368+
m_axis_cmd_valid_next = 1'b1;
369369

370-
data_out_next = init_data_reg[7:0];
371-
data_out_valid_next = 1'b1;
370+
m_axis_data_tdata_next = init_data_reg[7:0];
371+
m_axis_data_tvalid_next = 1'b1;
372372

373373
address_next = address_reg + 1;
374374

375375
state_next = STATE_TABLE_3;
376376
end else if (init_data_reg[8:7] == 2'b01) begin
377377
// write address
378-
cmd_address_next = init_data_reg[6:0];
379-
cmd_start_next = 1'b1;
378+
m_axis_cmd_address_next = init_data_reg[6:0];
379+
m_axis_cmd_start_next = 1'b1;
380380

381381
address_next = address_reg + 1;
382382

383383
state_next = STATE_TABLE_3;
384384
end else if (init_data_reg == 9'b000000011) begin
385385
// write current address
386-
cmd_address_next = cur_address_reg;
387-
cmd_start_next = 1'b1;
386+
m_axis_cmd_address_next = cur_address_reg;
387+
m_axis_cmd_start_next = 1'b1;
388388

389389
address_next = address_reg + 1;
390390

391391
state_next = STATE_TABLE_3;
392392
end else if (init_data_reg == 9'b001000001) begin
393393
// send stop
394-
cmd_write_next = 1'b0;
395-
cmd_start_next = 1'b0;
396-
cmd_stop_next = 1'b1;
397-
cmd_valid_next = 1'b1;
394+
m_axis_cmd_write_next = 1'b0;
395+
m_axis_cmd_start_next = 1'b0;
396+
m_axis_cmd_stop_next = 1'b1;
397+
m_axis_cmd_valid_next = 1'b1;
398398

399399
address_next = address_reg + 1;
400400

@@ -414,10 +414,10 @@ always @* begin
414414
state_next = STATE_RUN;
415415
end else if (init_data_reg == 9'd0) begin
416416
// stop
417-
cmd_start_next = 1'b0;
418-
cmd_write_next = 1'b0;
419-
cmd_stop_next = 1'b1;
420-
cmd_valid_next = 1'b1;
417+
m_axis_cmd_start_next = 1'b0;
418+
m_axis_cmd_write_next = 1'b0;
419+
m_axis_cmd_stop_next = 1'b1;
420+
m_axis_cmd_valid_next = 1'b1;
421421

422422
state_next = STATE_IDLE;
423423
end else begin
@@ -442,14 +442,14 @@ always @(posedge clk) begin
442442

443443
cur_address_reg <= cur_address_next;
444444

445-
cmd_address_reg <= cmd_address_next;
446-
cmd_start_reg <= cmd_start_next;
447-
cmd_write_reg <= cmd_write_next;
448-
cmd_stop_reg <= cmd_stop_next;
449-
cmd_valid_reg <= cmd_valid_next;
445+
m_axis_cmd_address_reg <= m_axis_cmd_address_next;
446+
m_axis_cmd_start_reg <= m_axis_cmd_start_next;
447+
m_axis_cmd_write_reg <= m_axis_cmd_write_next;
448+
m_axis_cmd_stop_reg <= m_axis_cmd_stop_next;
449+
m_axis_cmd_valid_reg <= m_axis_cmd_valid_next;
450450

451-
data_out_reg <= data_out_next;
452-
data_out_valid_reg <= data_out_valid_next;
451+
m_axis_data_tdata_reg <= m_axis_data_tdata_next;
452+
m_axis_data_tvalid_reg <= m_axis_data_tvalid_next;
453453

454454
start_flag_reg <= start & start_flag_next;
455455

@@ -466,9 +466,9 @@ always @(posedge clk) begin
466466

467467
cur_address_reg <= 7'd0;
468468

469-
cmd_valid_reg <= 1'b0;
469+
m_axis_cmd_valid_reg <= 1'b0;
470470

471-
data_out_valid_reg <= 1'b0;
471+
m_axis_data_tvalid_reg <= 1'b0;
472472

473473
start_flag_reg <= 1'b0;
474474

0 commit comments

Comments
 (0)