Connect dangling signals

Signed-off-by: Karol Gugala <[email protected]>

Author: kgugala

src/i3c.sv

@@ -410,6 +410,7 @@ module i3c
       .rlast_o(rlast_o),
       .rvalid_o(rvalid_o),
       .rready_i(rready_i),
+      .ruser_o(ruser_o),
 
       // AXI Write Channels
       .awaddr_i(awaddr_i),
@@ -433,6 +434,7 @@ module i3c
       .bid_o(bid_o),
       .bvalid_o(bvalid_o),
       .bready_i(bready_i),
+      .buser_o(buser_o),
 
       // I3C SW CSR access interface
       .s_cpuif_req(s_cpuif_req),

src/i3c_wrapper.sv

@@ -180,6 +180,7 @@ module i3c_wrapper #(
       .rlast_o(rlast_o),
       .rvalid_o(rvalid_o),
       .rready_i(rready_i),
+      .ruser_o(ruser_o),
 
       // AXI Write Channels
       .awaddr_i(awaddr_i),
@@ -203,6 +204,7 @@ module i3c_wrapper #(
       .bid_o(bid_o),
       .bvalid_o(bvalid_o),
       .bready_i(bready_i),
+      .buser_o(buser_o),
 `endif
 
       .i3c_scl_i  (scl_io2phy),

src/recovery/recovery_executor.sv

@@ -60,7 +60,6 @@ module recovery_executor
     output logic indirect_rx_clr_o,
 
     // Others
-    output logic pending_o,
     input  logic host_abort_i,
 
     // queues clr signals

src/recovery/recovery_handler.sv

@@ -967,7 +967,8 @@ module recovery_handler
       .ready_thld_i       ('0),
       .ready_thld_o       (),
       .start_thld_trig_o  (),
-      .ready_thld_trig_o  ()
+      .ready_thld_trig_o  (),
+      .depth_o            ()
   );
 
   // ....................................................