Set reset value for Indirect FIFO Max Xfer size in RDL

Author: robertszczepanski

src/csr/I3CCSR.sv

@@ -986,12 +986,6 @@ module I3CCSR (
                         logic load_next;
                     } FIFO_SIZE;
                 } INDIRECT_FIFO_STATUS_3;
-                struct packed{
-                    struct packed{
-                        logic [31:0] next;
-                        logic load_next;
-                    } MAX_TRANSFER_SIZE;
-                } INDIRECT_FIFO_STATUS_4;
                 struct packed{
                     struct packed{
                         logic [31:0] next;
@@ -2238,11 +2232,6 @@ module I3CCSR (
                         logic [31:0] value;
                     } FIFO_SIZE;
                 } INDIRECT_FIFO_STATUS_3;
-                struct packed{
-                    struct packed{
-                        logic [31:0] value;
-                    } MAX_TRANSFER_SIZE;
-                } INDIRECT_FIFO_STATUS_4;
                 struct packed{
                     struct packed{
                         logic [31:0] value;
@@ -5996,29 +5985,7 @@ module I3CCSR (
         end
     end
     assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.value;
-    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE
-    always_comb begin
-        automatic logic [31:0] next_c;
-        automatic logic load_next_c;
-        next_c = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.value;
-        load_next_c = '0;
-        if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.we) begin // HW Write - we
-            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.next;
-            load_next_c = '1;
-        end
-        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.next = next_c;
-        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.load_next = load_next_c;
-    end
-    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
-        if(~hwif_in.rst_ni) begin
-            field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.value <= 32'h0;
-        end else begin
-            if(field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.load_next) begin
-                field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.value <= field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.next;
-            end
-        end
-    end
-    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.value;
+    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.value = 32'h40;
     // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA
     always_comb begin
         automatic logic [31:0] next_c;
@@ -10312,7 +10279,7 @@ module I3CCSR (
     assign readback_array[52][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1.WRITE_INDEX.value : '0;
     assign readback_array[53][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2.READ_INDEX.value : '0;
     assign readback_array[54][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.value : '0;
-    assign readback_array[55][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.value : '0;
+    assign readback_array[55][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4 && !decoded_req_is_wr) ? 32'h40 : '0;
     assign readback_array[56][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA.value : '0;
     assign readback_array[57] = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_DATA.rd_ack ? hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_DATA.rd_data : '0;
     assign readback_array[58][7:0] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.EXTCAP_HEADER && !decoded_req_is_wr) ? 8'h12 : '0;

src/csr/I3CCSR_pkg.sv

@@ -562,15 +562,6 @@ package I3CCSR_pkg;
         I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_STATUS_3__FIFO_SIZE__in_t FIFO_SIZE;
     } I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_STATUS_3__in_t;
 
-    typedef struct packed{
-        logic [31:0] next;
-        logic we;
-    } I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_STATUS_4__MAX_TRANSFER_SIZE__in_t;
-
-    typedef struct packed{
-        I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_STATUS_4__MAX_TRANSFER_SIZE__in_t MAX_TRANSFER_SIZE;
-    } I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_STATUS_4__in_t;
-
     typedef struct packed{
         logic [31:0] next;
         logic we;
@@ -610,7 +601,6 @@ package I3CCSR_pkg;
         I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_STATUS_1__in_t INDIRECT_FIFO_STATUS_1;
         I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_STATUS_2__in_t INDIRECT_FIFO_STATUS_2;
         I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_STATUS_3__in_t INDIRECT_FIFO_STATUS_3;
-        I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_STATUS_4__in_t INDIRECT_FIFO_STATUS_4;
         I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_RESERVED__in_t INDIRECT_FIFO_RESERVED;
         I3CCSR__I3C_EC__SecFwRecoveryIf__INDIRECT_FIFO_DATA__in_t INDIRECT_FIFO_DATA;
     } I3CCSR__I3C_EC__SecFwRecoveryIf__in_t;

src/csr/I3CCSR_uvm.sv

@@ -2614,7 +2614,7 @@ package I3CCSR_uvm;
 
         virtual function void build();
             this.MAX_TRANSFER_SIZE = new("MAX_TRANSFER_SIZE");
-            this.MAX_TRANSFER_SIZE.configure(this, 32, 0, "RO", 1, 'h0, 1, 1, 0);
+            this.MAX_TRANSFER_SIZE.configure(this, 32, 0, "RO", 0, 'h40, 1, 1, 0);
             if (has_coverage(UVM_CVR_REG_BITS)) begin
                 foreach(MAX_TRANSFER_SIZE_bit_cg[bt]) MAX_TRANSFER_SIZE_bit_cg[bt] = new();
             end

src/rdl/docs/README.md

@@ -1906,11 +1906,12 @@ Component Memory Space (CMS):</p>
 
 |Bits|    Identifier   |Access|Reset|       Name      |
 |----|-----------------|------|-----|-----------------|
-|31:0|MAX_TRANSFER_SIZE|   r  | 0x0 |Max transfer size|
+|31:0|MAX_TRANSFER_SIZE|   r  | 0x40|Max transfer size|
 
 #### MAX_TRANSFER_SIZE field
 
 <p>Max size of the data payload in each read/write to INDIRECT_FIFO_DATA in 4B units</p>
+<p>Enforced to 256 bytes (64 DWORDs) by Caliptra Subsystem Recovery Sequence</p>
 
 ### INDIRECT_FIFO_RESERVED register
 

src/rdl/secure_firmware_recovery_interface.rdl

@@ -659,11 +659,12 @@ regfile SecureFirmwareRecoveryInterfaceRegisters{
         name = "Indirect FIFO Status 4";
         field {
             name = "Max transfer size";
-            desc = "Max size of the data payload in each read/write to INDIRECT_FIFO_DATA in 4B units";
+            desc = "Max size of the data payload in each read/write to INDIRECT_FIFO_DATA in 4B units
+
+                    Enforced to 256 bytes (64 DWORDs) by Caliptra Subsystem Recovery Sequence";
             sw = r;
-            hw = rw;
-            we = true;
-            reset = 32'h0;
+            hw = r;
+            reset = 32'd64;
         } MAX_TRANSFER_SIZE[31:0];
     } INDIRECT_FIFO_STATUS_4;
     reg {

src/recovery/recovery_executor.sv

@@ -681,7 +681,6 @@ module recovery_executor
     hwif_rec_o.INDIRECT_FIFO_CTRL_0.CMS.we = indirect_fifo_ctrl_0_we;
     hwif_rec_o.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.we = tti_rx_rack_i & (csr_sel == CSR_INDIRECT_FIFO_CTRL_1);
     hwif_rec_o.INDIRECT_FIFO_STATUS_0.REGION_TYPE.we = '0;
-    hwif_rec_o.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.we = 1'b1;
     hwif_rec_o.INDIRECT_FIFO_RESERVED.DATA.we = '0;
   end
 
@@ -739,7 +738,6 @@ module recovery_executor
     hwif_rec_o.PROT_CAP_3.NUM_OF_CMS_REGIONS.next = '0;
     hwif_rec_o.PROT_CAP_3.MAX_RESP_TIME.next = '0;
     hwif_rec_o.PROT_CAP_3.HEARTBEAT_PERIOD.next = '0;
-    hwif_rec_o.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.next = 32'd64;  // Caliptra Subsystem Recovery Sequence specifies this to 256 bytes (64 DWORDs)
     hwif_rec_o.PROT_CAP_2.REC_PROT_VERSION.next = '0;
     hwif_rec_o.PROT_CAP_2.AGENT_CAPS.next = '0;
     hwif_rec_o.HW_STATUS.TEMP_CRITICAL.next = '0;

verification/cocotb/common/reg_map.py

@@ -2009,9 +2009,9 @@
                 "MAX_TRANSFER_SIZE": {
                     "low": 0,
                     "mask": 4294967295,
-                    "reset": 0,
+                    "reset": 64,
                     "sw": "r",
-                    "hw": "rw",
+                    "hw": "r",
                     "woclr": 0,
                     "rclr": 0,
                     "hwclr": 0

verification/cocotb/top/lib_i3c_top/test_bypass.py

@@ -793,8 +793,6 @@ def csr_access_test_data(tb, rd_acc=Access.Priv, wr_acc=Access.Priv):
             # by 'recovery_executor' to 'IndirectFifoDepth' parameter
             if reg_name == "INDIRECT_FIFO_STATUS_3" and f_name == "FIFO_SIZE":
                 data = 0x40
-            if reg_name == "INDIRECT_FIFO_STATUS_4" and f_name == "MAX_TRANSFER_SIZE":
-                data = 0x40
 
             if rd_acc == Access.Unpriv:
                 data = 0x0

verification/cocotb/top/lib_i3c_top/test_recovery.py

@@ -1446,10 +1446,6 @@ def csr_access_test_data(tb):
             # by 'recovery_executor' to 'IndirectFifoDepth' parameter
             if reg_name == "INDIRECT_FIFO_STATUS_3" and f_name == "FIFO_SIZE":
                 data = 0x40
-            # The reset value of 'INDIRECT_FIFO_STATUS_4' is currently unused
-            # and tied to 0
-            if reg_name == "INDIRECT_FIFO_STATUS_4" and f_name == "MAX_TRANSFER_SIZE":
-                data = 0x0
 
             exp_rd |= data
         test_data.append([reg_name, addr, wdata, exp_rd])