boards/arm/am67: Add support for T3 Gemstone O1 board · Pull Request #17229 · apache/nuttx

ghost · 2025-10-22T15:05:38Z

Summary

This PR introduces basic support for the T3 Gemstone O1 (t3-gem-o1)
development board, including board configuration, linker scripts, and
drivers for NSH. Currently only UART console is supported.
All necessary files and configurations are added to enable building and
running NuttX on this TI AM67-based board.

For more information about the board:

Website: https://www.t3gemstone.org/en
Board Specs: https://docs.t3gemstone.org/en/boards/o1/introduction
Documentation: https://docs.t3gemstone.org/en/projects/nuttx

Impact

Add support for TI AM67 chip.

Add new TI AM67-based board named t3-gem-o1.

Provide defconfigs:

nsh

Testing

Tested on host: Ubuntu 24.04 noble, with arm-none-eabi-gcc (15:13.2.rel1-2) 13.2.1 20231009 toolchain.

Board: t3-gem-o1

nsh

Configure and build:

❯ ./tools/configure.sh -E -l t3-gem-o1:nsh
❯ make -s -j$(nproc)

Open NuttShell on UART-MAIN1:

❯ picocom -b 115200 /dev/ttyACM0

NuttShell (NSH) NuttX-12.11.0
nsh> cat proc/version
NuttX version 12.11.0 8bdbb8c7d5-dirty Oct 22 2025 14:15:42 t3-gem-o1:nsh
nsh> help
help usage:  help [-v] [<cmd>]

  .           cmp         fdinfo      mount       rptun       unset
  [           dirname     free        mv          set         uptime
  ?           df          help        pidof       sleep       usleep
  alias       dmesg       hexdump     printf      source      watch
  unalias     echo        kill        ps          test        xd
  basename    env         pkill       pwd         time
  break       exec        ln          readlink    true
  cat         exit        ls          rm          truncate
  cd          expr        mkdir       rmdir       uname
  cp          false       mkrd        rpmsg       umount

Builtin Apps:
  dd        nsh       ostest    sh
nsh>

linguini1

Thanks for this awesome port!

I see this has ARM64 cores and R5F cores, and this is just support for the R5F cores. I suppose that's why it lives under arch/arm instead of arch/arm64. Have you considered getting NuttX to run on the A53 cores (that's already supported on other boards)? I wonder what the approach would be for that scenario, two different NuttX images on a per-core-type basis? Just curious, nothing to do with this PR.
For your documentation, could you tweak it a little bit to follow the format from the standard board documentation template? It can be found in Documentation/contributing/doc_templates/board.rst. Your docs look pretty close to it right now, but could have information about how to flash it, some information about what the naming is for configuring your board (i.e. what is the board name for tools/configure.sh to find), an image, etc. Also, I would mark this board as experimental in the tags section, since it has very minimal support right now. Also, a warning about which peripherals are supported only would be good:

.. tags:: chip:am67, experimental

.. warning::
   
   This board currently only supports a basic implementation of NuttX with
   only UART console as a supported peripheral. Please see the contributing
   documentation if you would like to help contribute to the support.

linguini1

Please add support for the CMake build system as well.

arch/arm/src/am67/am67_irq.c

linguini1 · 2025-10-22T17:39:04Z

arch/arm/src/am67/am67_irq.c

+ *
+ ****************************************************************************/
+
+static void utils_data_and_instruction_barrier(void)


I think there might be an architecture implementation for this for all ARM chips, you should re-use that instead. I think UP_DMB is for data memory, there is probably something similar for other barriers.

arch/arm/src/am67/am67_irq.c

arch/arm/src/am67/am67_mpuinit.c

linguini1 · 2025-10-22T17:42:37Z

arch/arm/src/am67/am67_mpuinit.h

+static inline void am67_mpu_disable_br(void)
+{
+  unsigned int sctlr = cp15_rdsctlr();
+  sctlr &= ~(1 << 17);  /* Clear bit 17 (disable background region) */


I would recommend that you give these special bits a name in your register mapping definition file, it makes the code much easier to read.

Ex:

#define AM67_SCTLR_BG_REGION_EN (1 << 17) /* later in your function */ sctlr &= ~AM67_SCTLR_BG_REGION_EN;

Also, this would be a good place to use modreg32 instead of the cp15_wrsctlr/cp16_rdsctlr functions.

arch/arm/src/am67/am67_timer.c

linguini1 · 2025-10-22T17:48:30Z

arch/arm/src/am67/am67_timer.c

+ *
+ ****************************************************************************/
+
+int up_timer_gettime(struct timespec *ts)


Not incredibly familiar with the up_timer_* functions, but I don't think your implementation matches the requirements at all?

This function should return 0 on success, negated errno on failure. Your implementation returns the contents of some timer register. The timespec argument is unused, but it must contain the up-time you pull from the timer.

I would also suggest adding a DEBUGASSERT(ts != NULL).

Ditto for the remaining timer functions, make sure you adhere to the function specification.

Hi, please take a look at my earlier comment on this.

arch/arm/src/am67/chip.h

boards/Kconfig

Documentation/platforms/arm/am67/boards/t3-gem-o1/index.rst

ghost · 2025-10-23T12:45:39Z

@linguini1

I see this has ARM64 cores and R5F cores, and this is just support for the R5F cores. I suppose that's why it lives under arch/arm instead of arch/arm64. Have you considered getting NuttX to run on the A53 cores (that's already supported on other boards)? I wonder what the approach would be for that scenario, two different NuttX images on a per-core-type basis? Just curious, nothing to do with this PR.

Real‑Time Linux is deployed on the four Cortex‑A53 cores. Those cores provide the high‑performance compute power needed for demanding workloads such as image‑processing pipelines, vision algorithms, and other application‑level tasks.

For safety‑critical functions—e.g., the autopilot control loop—we are planning on running NuttX on the dedicated Cortex‑R5F cores. The R5F cores are purpose‑built for deterministic, low‑latency execution, which makes them ideal for hard real‑time control code.

Communication between the two domains will be performed through the RPMsg framework. RPMsg provides a lightweight, message‑based inter‑processor communication (IPC) channel that lets the Linux side exchange data with the NuttX side while preserving isolation and real‑time guarantees.

xiaoxiang781216 · 2025-10-24T11:44:51Z

@erkan-vatan please squash patch 4 to patch 3 and patch 5 to patch 2.

simbit18 · 2025-10-24T12:23:50Z

@erkan-vatan
signature (git commit -s)

ff7c556d60 Merge 0ecaf44ac8a5086d025b9007aa07f31fbf96a772 into b2e823d0b981b10540acc8d1902b5adba4750357
0ecaf44ac8 docs/boards: Add documentation for t3-gem-o1 board.
c29a526de3 boards/arm/am67: Add support for t3-gem-o1 board.
0164001944 arch/arm/am67: Add support for TI AM67 chips.
../nuttx/tools/checkpatch.sh -c -u -m -g b2e823d0b981b10540acc8d1902b5adba4750357..HEAD
Missing Signed-off-by
Missing Signed-off-by
Missing Signed-off-by

https://github.com/apache/nuttx/actions/runs/18779303663/job/53582075265?pr=17229#logs

ghost · 2025-10-24T16:05:20Z

@linguini1
I ran into an issue while adding CMake build‑system support. In my .vectors section, _vector_start resides at address 0x0, whereas __start is placed at 0x40. My hardware requires execution to begin at _vector_start, but the linker keeps using __start as the default entry point regardless of my attempts to change it. With a Makefile‑based build I was able to fix the problem by defining:

LDFLAGS += --entry=_vector_start

inside arch/arm/src/am67/Make.defs file. I’m not sure if this is the proper solution, but I couldn’t locate any alternative method. Declaring ENTRY(_vector_start) in the linker script has no effect. How can I replicate this behavior inside the CMakeLists.txt?

linguini1 · 2025-10-24T16:13:49Z

@simbit18 any ideas?

arasnazmi · 2026-02-19T10:15:49Z

I have refreshed the configuration as suggested using:
./tools/refresh.sh --silent t3-gem-o1:nsh

The changes have been applied and a new commit has been pushed.
@acassis Could you please re-check the CI?

simbit18 · 2026-02-19T10:53:07Z

Hi @arasnazmi, please fix

5e1fb5f062 boards/arm/am67/t3-gem-o1: Fix GICv2 config in nsh defconfig Remove explicit CONFIG_ARMV7R_HAVE_GICv2=n and rely on the default configuration while keeping GICv2 disabled via "CONFIG_ARMV7R_HAVE_GICv2 is not set".
9599ad1dd9 docs/boards: Add documentation for t3-gem-o1 board.
7267e5cd6a boards/arm/am67: Add support for t3-gem-o1 board.
9b5948ac71 arch/arm/am67: Add support for TI AM67 chips.
55e433347a arch/armv7-r: Include arm_mpu.c when CONFIG_ARM_MPU is enabled.
d6fd01fd4e arch/armv7-r: Resolve format‑specifier warnings by using proper macros.
../nuttx/tools/checkpatch.sh -c -u -m -g fc1ae9b7becd31b4e966aee2e7ebfc263e942701..HEAD
❌ Missing git commit message
Used config files:
    1: .codespellrc
Some checks failed. For contributing guidelines, see:
  https://github.com/apache/nuttx/blob/master/CONTRIBUTING.md
Error: Process completed with exit code 1.

arasnazmi · 2026-02-19T11:23:04Z

I fixed it, could you check again?

acassis · 2026-02-19T11:59:33Z

@linguini1 please check again, they added CMake support!

simbit18 · 2026-02-19T13:46:28Z

@arasnazmi this error occurs

====================================================================================
Configuration/Tool: t3-gem-o1/nsh,CONFIG_ARM_TOOLCHAIN_GNU_EABI
2026-02-19 11:35:49
------------------------------------------------------------------------------------
  Cleaning...
  Configuring...
  Disabling CONFIG_ARM_TOOLCHAIN_GNU_EABI
  Enabling CONFIG_ARM_TOOLCHAIN_GNU_EABI
  Building NuttX...
Makefile:169: target 'arm_perf.o' given more than once in the same rule
Makefile:169: target 'arm_perf.o' given more than once in the same rule
Makefile:169: target 'arm_perf.o' given more than once in the same rule
In file included from rpmsg/rpmsg.h:30,
                 from rpmsg/rpmsg.c:35:
Error: /github/workspace/sources/nuttx/include/nuttx/rpmsg/rpmsg.h:70:3: error: unknown type name 'atomic_int'
   70 |   atomic_int                   signals;
      |   ^~~~~~~~~~
rpmsg/rpmsg.c: In function 'rpmsg_register':
Error: rpmsg/rpmsg.c:534:3: error: implicit declaration of function 'atomic_store'; did you mean 'atomic_set'? [-Werror=implicit-function-declaration]
  534 |   atomic_store(&rpmsg->signals, RPMSG_SIGNAL_RUNNING);
      |   ^~~~~~~~~~~~
      |   atomic_set
cc1: all warnings being treated as errors
make[1]: *** [Makefile:109: rpmsg.o] Error 1
rptun/rptun.c: In function 'rptun_dev_stop':
Error: rptun/rptun.c:935:7: error: implicit declaration of function 'nxsched_waitpid'; did you mean 'nxsched_getpid'? [-Werror=implicit-function-declaration]
  935 |       nxsched_waitpid(priv->pid, NULL, WEXITED);
      |       ^~~~~~~~~~~~~~~
      |       nxsched_getpid
Error: rptun/rptun.c:935:40: error: 'WEXITED' undeclared (first use in this function); did you mean 'CLD_EXITED'?
  935 |       nxsched_waitpid(priv->pid, NULL, WEXITED);
      |                                        ^~~~~~~
      |                                        CLD_EXITED
rptun/rptun.c:935:40: note: each undeclared identifier is reported only once for each function it appears in
cc1: all warnings being treated as errors
make[1]: *** [Makefile:109: rptun.o] Error 1
make[1]: Target 'libdrivers.a' not remade because of errors.
make: *** [tools/LibTargets.mk:107: drivers/libdrivers.a] Error 2
Makefile:169: target 'arm_perf.o' given more than once in the same rule
In file included from /github/workspace/sources/nuttx/include/nuttx/rptun/rptun.h:35,
                 from chip/am67_boot.c:29:
Error: /github/workspace/sources/nuttx/include/nuttx/rpmsg/rpmsg.h:70:3: error: unknown type name 'atomic_int'
   70 |   atomic_int                   signals;
      |   ^~~~~~~~~~
make[1]: *** [Makefile:170: am67_boot.o] Error 1
make[1]: Target 'libarch.a' not remade because of errors.
make: *** [tools/LibTargets.mk:170: arch/arm/src/libarch.a] Error 2
In file included from nsh_syscmds.c:30:
Error: /github/workspace/sources/nuttx/include/nuttx/rpmsg/rpmsg.h:70:3: error: unknown type name 'atomic_int'
   70 |   atomic_int                   signals;
      |   ^~~~~~~~~~
make[2]: *** [/github/workspace/sources/apps/Application.mk:239: nsh_syscmds.c.github.workspace.sources.apps.nshlib.o] Error 1
make[2]: Target 'all' not remade because of errors.
make[1]: *** [Makefile:54: /github/workspace/sources/apps/nshlib_all] Error 2
make[1]: Target 'all' not remade because of errors.
make: *** [tools/LibTargets.mk:248: /github/workspace/sources/apps/libapps.a] Error 2
make: Target 'all' not remade because of errors.
/github/workspace/sources/nuttx/tools/testbuild.sh: line 385: /github/workspace/sources/nuttx/../nuttx/nuttx.manifest: No such file or directory
  [1/1] Normalize t3-gem-o1/nsh
====================================================================================

linguini1 · 2026-02-19T15:07:52Z

@linguini1 please check again, they added CMake support!

Hi @acassis and @arasnazmi, there are still some unresolved review comments about the timer functions not adhering to the return type + magic bit shifts. Please resolve those :)

The previous use of `%u` and `%X` for `uint32_t` values triggered compiler warnings. These have been replaced with the appropriate format‑specifier macros to ensure type‑correctness and eliminate the warnings. Signed-off-by: Erkan Vatan <evatan@t3gemstone.org>

Previously, arm_mpu.c was only compiled when CONFIG_BUILD_PROTECTED was enabled. This caused build failures when CONFIG_ARM_MPU was set without CONFIG_BUILD_PROTECTED. The build logic has been updated to include arm_mpu.c whenever either CONFIG_ARM_MPU or CONFIG_BUILD_PROTECTED is enabled. Signed-off-by: Erkan Vatan <evatan@t3gemstone.org>

This commit introduces basic support for running NuttX on main domain R5F core of TI AM67 chips, including irq, mpu, pinmux, timer, and serial configurations. Currently only UART console is supported. NuttX can be loaded into R5F core from U-Boot or Linux via RemoteProc. Co-authored-by: Emre Cecanpunar <emreleno@gmail.com> Co-authored-by: Abdullah Türkmen <abdullahturkmen@protonmail.com> Co-authored-by: Muhammet Onur Bayraktar <mobayraktar@t3gemstone.org> Co-authored-by: Bayram Akay <bakay@t3gemstone.org> Signed-off-by: Erkan Vatan <evatan@t3gemstone.org>

This commit introduces basic support for the T3 Gemstone O1 (t3-gem-o1) development board, including board configuration, linker scripts, and drivers for NSH. Currently only UART console is supported. All necessary files and configurations are added to enable building and running NuttX on this TI AM67-based board. Co-authored-by: Emre Cecanpunar <emreleno@gmail.com> Co-authored-by: Abdullah Türkmen <abdullahturkmen@protonmail.com> Co-authored-by: Muhammet Onur Bayraktar <mobayraktar@t3gemstone.org> Co-authored-by: Bayram Akay <bakay@t3gemstone.org> Signed-off-by: Erkan Vatan <evatan@t3gemstone.org>

Add documentation for the T3 Gemstone O1 (t3-gem-o1) development board, including board specifications, serial console, available configurations (nsh), and installation instructions via RemoteProc. Signed-off-by: Erkan Vatan <evatan@t3gemstone.org>

Remove explicit CONFIG_ARMV7R_HAVE_GICv2=n and rely on default configuration. Signed-off-by: Nazmi Aras <nazmi.aras@t3gemstone.org>

Replace custom data and instruction barrier implementation with architecture-independent UP_MB() macro for better portability and code consistency. Signed-off-by: Nazmi Aras <nazmi.aras@t3gemstone.org>

Replace magic number (1 << 17) with AM67_SCTLR_BG_REGION_EN macro for better code readability and maintainability. Signed-off-by: Nazmi Aras <nazmi.aras@t3gemstone.org>

- Add DEBUGASSERT to validate timespec parameter - Store timer value in temporary variable for clarity - Calculate tv_nsec and tv_sec from timer count - Return OK instead of raw timer value for proper error handling Signed-off-by: Nazmi Aras <nazmi.aras@t3gemstone.org>

arasnazmi · 2026-02-21T10:57:01Z

I have applied the review comments to the code and updated the project by rebasing it. I believe the issue related to RPMsg has been resolved. Could you please check it again?

linguini1

Please also fix the style errors :)

linguini1 · 2026-02-21T15:29:01Z

arch/arm/src/am67/am67_timer.c

+ *
+ ****************************************************************************/
+
+int up_timer_gettime(struct timespec *ts)


Hi, please take a look at my earlier comment on this.

ghost requested review from Donny9, Ouss4, acassis, jerpelea, raiden00pl and xiaoxiang781216 as code owners October 22, 2025 15:05

github-actions bot added Area: Documentation Improvements or additions to documentation Arch: arm Issues related to ARM (32-bit) architecture Board: arm Size: XL The size of the change in this PR is very large. Consider breaking down the PR into smaller pieces. labels Oct 22, 2025

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Documentation/platforms/arm/am67/boards/t3-gem-o1/index.rst Outdated Show resolved Hide resolved

ghost changed the title ~~Add support for T3 Gemstone O1 board~~ boards/arm/am67: Add support for T3 Gemstone O1 board Oct 24, 2025

ghost changed the title ~~boards/arm/am67: Add support for T3 Gemstone O1 board~~ boards/am67/t3-gem-o1: Add support for T3 Gemstone O1 board Oct 24, 2025

ghost force-pushed the pr-t3-gem-o1-board branch from 3eb2972 to 0ecaf44 Compare October 24, 2025 12:09

ghost force-pushed the pr-t3-gem-o1-board branch from 0ecaf44 to 299d4e0 Compare October 24, 2025 12:28

acassis previously approved these changes Oct 24, 2025

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ghost dismissed acassis’s stale review via 9a28c92 October 25, 2025 09:25

ghost force-pushed the pr-t3-gem-o1-board branch from 299d4e0 to 9a28c92 Compare October 25, 2025 09:25

ghost requested review from GUIDINGLI and davids5 as code owners October 25, 2025 09:25

ghost force-pushed the pr-t3-gem-o1-board branch from 9a28c92 to 34af2ae Compare October 25, 2025 09:56

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ghost force-pushed the pr-t3-gem-o1-board branch from 34af2ae to ec9aca1 Compare October 25, 2025 10:00

arasnazmi force-pushed the pr-t3-gem-o1-board branch from 042e578 to 9599ad1 Compare February 19, 2026 10:09

github-actions bot added Area: Build system and removed Area: Documentation Improvements or additions to documentation labels Feb 19, 2026

arasnazmi force-pushed the pr-t3-gem-o1-board branch 2 times, most recently from 0b54735 to 9599ad1 Compare February 19, 2026 11:19

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jerpelea changed the title ~~boards/am67/t3-gem-o1: Add support for T3 Gemstone O1 board~~ boards/arm/am67: Add support for T3 Gemstone O1 board Feb 19, 2026

Erkan Vatan and others added 9 commits February 21, 2026 11:56

boards/arm/am67/t3-gem-o1: Fix GICv2 config in nsh defconfig.

5db3299

Remove explicit CONFIG_ARMV7R_HAVE_GICv2=n and rely on default configuration. Signed-off-by: Nazmi Aras <nazmi.aras@t3gemstone.org>

boards/arm/am67/t3-gem-o1: Replace custom barrier with UP_MB() macro

ab0ce51

Replace custom data and instruction barrier implementation with architecture-independent UP_MB() macro for better portability and code consistency. Signed-off-by: Nazmi Aras <nazmi.aras@t3gemstone.org>

boards/arm/am67/t3-gem-o1: Use macro for SCTLR background region bit

77423f9

Replace magic number (1 << 17) with AM67_SCTLR_BG_REGION_EN macro for better code readability and maintainability. Signed-off-by: Nazmi Aras <nazmi.aras@t3gemstone.org>

arasnazmi dismissed jerpelea’s stale review via 2401f2f February 21, 2026 10:51

arasnazmi force-pushed the pr-t3-gem-o1-board branch from a4b78ca to 2401f2f Compare February 21, 2026 10:51

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ghost commented Oct 22, 2025

Summary

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nsh

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