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@Josen-B Josen-B commented Aug 28, 2025

@Josen-B Josen-B requested review from aarkegz and hky1999 August 28, 2025 03:07
Cargo.toml Outdated

[features]
fs = ["axstd/fs"]
4-level-page = ["axaddrspace/4-level-page", "axvm/4-level-page"]
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we need to clarify it's the axvisor itself uses 4-level page table or it's the guest kernel that uses 4 level pt.

Maybe "4-level-ept" is better?

Btw, can we make sure that the hardware does not support 4-level pet?

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@Josen-B Josen-B Aug 29, 2025

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"4-level-ept" is modified.
yes, The Cortex-A55 core supports a 40-bit physical address range, which allows 1TB of physical memory to be addressed. which is mentioned in Cortex-A55 TRM A5.1.1 Main functions. If the page size is 4KB, 4-level-ept required at least 48-bit.
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@Josen-B Josen-B force-pushed the 3_level_page_master branch 2 times, most recently from adb4b59 to 452d232 Compare August 29, 2025 09:38
@Josen-B Josen-B changed the title add feature: 4-level-page add feature: 4-level-ept Aug 29, 2025
@Josen-B Josen-B requested a review from hky1999 August 29, 2025 09:45
@Josen-B Josen-B force-pushed the 3_level_page_master branch 2 times, most recently from ab1aeb1 to eda7030 Compare September 9, 2025 01:31
@Josen-B Josen-B force-pushed the 3_level_page_master branch from eda7030 to bbb7d1d Compare September 9, 2025 03:16
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Josen-B commented Sep 9, 2025

主线存在以前遗留的dependencies版本问题,向新版本next合并,挂起此Pr
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2 participants