Merge pull request #1 from bullhh/axtest

适配 axstd 0.3.0，更新依赖与配置

Author: chyyuu

.axconfig.toml

@@ -1,9 +1,9 @@
 # Architecture identifier.
-arch = "x86_64" # str
-# Platform Package.
-package = "axplat-x86-pc" # str
+arch = "riscv64" # str
+# Platform package.
+package = "axplat-riscv64-qemu-virt" # str
 # Platform identifier.
-platform = "x86-pc" # str
+platform = "riscv64-qemu-virt" # str
 # Stack size of each task.
 task-stack-size = 0x40000 # uint
 # Number of timer ticks per second (Hz). A timer tick may contain several timer
@@ -15,51 +15,92 @@ ticks-per-sec = 100 # uint
 #
 [devices]
 # IPI interrupt num
-ipi-irq = 0xf3 # uint
+ipi-irq = "0x8000_0000_0000_0001" # uint
 # MMIO ranges with format (`base_paddr`, `size`).
 mmio-ranges = [
-    [0xb000_0000, 0x1000_0000],
-    [0xfe00_0000, 0xc0_0000],
-    [0xfec0_0000, 0x1000],
-    [0xfed0_0000, 0x1000],
-    [0xfee0_0000, 0x1000]
+    [0x0010_1000, 0x1000],
+    [0x0c00_0000, 0x21_0000],
+    [0x1000_0000, 0x1000],
+    [0x1000_1000, 0x8000],
+    [0x3000_0000, 0x1000_0000],
+    [0x4000_0000, 0x4000_0000]
 ] # [(uint, uint)]
-# End PCI bus number.
+# End PCI bus number (`bus-range` property in device tree).
 pci-bus-end = 0xff # uint
-# Base physical address of the PCIe ECAM space (should read from ACPI 'MCFG' table).
-pci-ecam-base = 0xb000_0000 # uint
-# PCI device memory ranges (not used on x86).
-pci-ranges = [] # [(uint, uint)]
-# Timer interrupt frequency in Hz. (4.0GHz)
-timer-frequency = 4_000_000_000 # uint
+# Base physical address of the PCIe ECAM space.
+pci-ecam-base = 0x3000_0000 # uint
+# PCI device memory ranges (`ranges` property in device tree).
+pci-ranges = [
+    [0x0300_0000, 0x1_0000],
+    [0x4000_0000, 0x4000_0000],
+    [0x4_0000_0000, 0x4_0000_0000]
+] # [(uint, uint)]
+# plic@c000000 {
+#     phandle = <0x03>;
+#     riscv,ndev = <0x5f>;
+#     reg = <0x00 0xc000000 0x00 0x600000>;
+#     interrupts-extended = <0x02 0x0b 0x02 0x09>;
+#     interrupt-controller;
+#     compatible = "sifive,plic-1.0.0\0riscv,plic0";
+# };
+plic-paddr = 0x0c00_0000 # uint
+# rtc@101000 {
+#     interrupts = <0x0b>;
+#     interrupt-parent = <0x03>;
+#     reg = <0x00 0x101000 0x00 0x1000>;
+#     compatible = "google,goldfish-rtc";
+# };
+# RTC (goldfish) Address
+rtc-paddr = 0x10_1000 # uint
+# Timer interrupt frequency in Hz.
+timer-frequency = 10_000_000 # uint
 # Timer interrupt num.
-timer-irq = 0xf0 # uint
+timer-irq = "0x8000_0000_0000_0005" # uint
+uart-irq = 0x0a # uint
+# serial@10000000 {
+#     interrupts = <0x0a>;
+#     interrupt-parent = <0x03>;
+#     clock-frequency = "\08@";
+#     reg = <0x00 0x10000000 0x00 0x100>;
+#     compatible = "ns16550a";
+# };
+uart-paddr = 0x1000_0000 # uint
 # VirtIO MMIO ranges with format (`base_paddr`, `size`).
-virtio-mmio-ranges = [] # [(uint, uint)]
+virtio-mmio-ranges = [
+    [0x1000_1000, 0x1000],
+    [0x1000_2000, 0x1000],
+    [0x1000_3000, 0x1000],
+    [0x1000_4000, 0x1000],
+    [0x1000_5000, 0x1000],
+    [0x1000_6000, 0x1000],
+    [0x1000_7000, 0x1000],
+    [0x1000_8000, 0x1000]
+] # [(uint, uint)]
 
 #
 # Platform configs
 #
 [plat]
 # Stack size on bootstrapping. (256K)
 boot-stack-size = 0x40000 # uint
-# Number of CPUs.
-cpu-num = 1 # uint
+# Maximum number of CPUs. For platforms that do not support runtime CPU number
+# detection, it's also the number of CPUs to boot.
+max-cpu-num = 1  
 # Kernel address space base.
-kernel-aspace-base = "0xffff_8000_0000_0000" # uint
+kernel-aspace-base = "0xffff_ffc0_0000_0000" # uint
 # Kernel address space size.
-kernel-aspace-size = "0x0000_7fff_ffff_f000" # uint
+kernel-aspace-size = "0x0000_003f_ffff_f000" # uint
 # Base physical address of the kernel image.
-kernel-base-paddr = 0x20_0000 # uint
+kernel-base-paddr = 0x8020_0000 # uint
 # Base virtual address of the kernel image.
-kernel-base-vaddr = "0xffff_8000_0020_0000" # uint
+kernel-base-vaddr = "0xffff_ffc0_8020_0000" # uint
 # Offset of bus address and phys address. some boards, the bus address is
 # different from the physical address.
 phys-bus-offset = 0 # uint
 # Base address of the whole physical memory.
-phys-memory-base = 0 # uint
+phys-memory-base = 0x8000_0000 # uint
 # Size of the whole physical memory. (128M)
 phys-memory-size = 0x800_0000 # uint
 # Linear mapping offset, for quick conversions between physical and virtual
 # addresses.
-phys-virt-offset = "0xffff_8000_0000_0000" # uint
+phys-virt-offset = "0xffff_ffc0_0000_0000" # uint

.github/workflows/ci.yml

@@ -0,0 +1,31 @@
+name: CI
+
+on:
+    push:
+        branches: [main, dev, master]
+    pull_request:
+        branches: [main, dev, master]
+
+jobs:
+    test:
+        runs-on: ubuntu-latest
+        container: ghcr.io/chyyuu/tangram-crates
+
+        steps:
+            - name: Checkout repository
+              uses: actions/checkout@v4
+
+            - name: Verify tools
+              run: |
+                  echo "=== Checking Rust version ==="
+                  rustc --version --verbose
+                  echo ""
+                  echo "=== Checking QEMU version ==="
+                  qemu-system-riscv64 --version
+                  qemu-system-x86_64 --version
+                  qemu-system-aarch64 --version
+                  qemu-system-loongarch64 --version
+                  echo ""
+
+            - name: Run tests
+              run: ./scripts/test.sh