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9 changes: 9 additions & 0 deletions page_table_multiarch/src/bits64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,13 @@ impl<M: PagingMetaData, PTE: GenericPTE, H: PagingHandler> PageTable64<M, PTE, H
})
}

pub fn from_paddr(root_paddr: PhysAddr) -> Self {
Self {
root_paddr,
_phantom: PhantomData,
}
}

/// Returns the physical address of the root page table.
pub const fn root_paddr(&self) -> PhysAddr {
self.root_paddr
Expand Down Expand Up @@ -524,6 +531,8 @@ impl<M: PagingMetaData, PTE: GenericPTE, H: PagingHandler> PageTable64<M, PTE, H

impl<M: PagingMetaData, PTE: GenericPTE, H: PagingHandler> Drop for PageTable64<M, PTE, H> {
fn drop(&mut self) {
warn!("Dropping page table @ {:#x}", self.root_paddr());

// don't free the entries in last level, they are not array.
let _ = self.walk(
usize::MAX,
Expand Down
14 changes: 14 additions & 0 deletions page_table_multiarch/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -83,8 +83,22 @@ pub trait PagingMetaData: Sync + Send {
pub trait PagingHandler: Sized {
/// Request to allocate a 4K-sized physical frame.
fn alloc_frame() -> Option<PhysAddr>;

/// Request to allocate a number of contiguous 4K-sized physical frames.
/// `align_pow2` must be a power of 2, and the returned region bound will be
/// aligned to it.
fn alloc_frames(count: usize, align_pow2: usize) -> Option<PhysAddr>;

/// Request to free a allocated physical frame.
fn dealloc_frame(paddr: PhysAddr);

/// Request to free a number of contiguous physical frames.
fn dealloc_frames(paddr: PhysAddr, count: usize) {
for i in 0..count {
Self::dealloc_frame(paddr.add(i * PageSize::Size4K as usize));
}
}

/// Returns a virtual address that maps to the given physical address.
///
/// Used to access the physical memory directly in page table implementation.
Expand Down
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