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Enable BLE on OPTA and Portenta H7 #180

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Enable BLE on OPTA and Portenta H7 #180

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5cb8d58
stm32h7: restore 1200bps functionality by enabling Backup area access
facchinm Aug 5, 2025
6fe001f
giga: disable M4 boot at init
pennam Aug 8, 2025
a822034
opta: disable M4 boot at init
pennam Aug 8, 2025
4ec1757
portentah7: enable BLE
pennam Aug 8, 2025
df066fa
opta: enable BLE
pennam Aug 8, 2025
a21e8c8
opta: fix i2c1 pins conflicting with BLE hci
pennam Aug 8, 2025
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4 changes: 2 additions & 2 deletions boards.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -249,7 +249,7 @@ portentah7.menu.debug.true.postbuild_debug=-debug

[email protected]//m7
portentah7.build.zephyr_args=
portentah7.build.zephyr_hals=hal_stm32
portentah7.build.zephyr_hals=hal_stm32 hal_infineon
portentah7.build.variant=arduino_portenta_h7_stm32h747xx_m7
portentah7.build.mcu=cortex-m7
portentah7.build.fpu=-mfpu=fpv5-d16
Expand Down Expand Up @@ -487,7 +487,7 @@ opta.menu.debug.true.postbuild_debug=-debug

opta.build.zephyr_target=arduino_opta//m7
opta.build.zephyr_args=
opta.build.zephyr_hals=hal_stm32
opta.build.zephyr_hals=hal_stm32 hal_infineon
opta.build.variant=arduino_opta_stm32h747xx_m7
opta.build.mcu=cortex-m7
opta.build.fpu=-mfpu=fpv5-d16
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10 changes: 10 additions & 0 deletions loader/fixups.c
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Expand Up @@ -39,6 +39,16 @@ SYS_INIT(disable_bootloader_mpu, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAU
SYS_INIT(disable_mpu_rasr_xn, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif

#if defined(CONFIG_SOC_STM32H747XX_M7)
void enable_bkp_access(void)
{
/* Enable access to the backup domain */
// HAL_PWR_EnableBkUpAccess();
SET_BIT(PWR->CR1, PWR_CR1_DBP);
}
SYS_INIT(enable_bkp_access, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif

#if defined(CONFIG_BOARD_ARDUINO_GIGA_R1) && defined(CONFIG_VIDEO)
#include <zephyr/kernel.h>
#include <zephyr/device.h>
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2 changes: 2 additions & 0 deletions variants/arduino_giga_r1_stm32h747xx_m7/arduino_giga_r1_stm32h747xx_m7.conf
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Expand Up @@ -64,3 +64,5 @@ CONFIG_CYW4343W_MURATA_1DX=y
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048
CONFIG_BT_RX_STACK_SIZE=4096
CONFIG_BT_HCI_TX_STACK_SIZE=4096

CONFIG_STM32H7_BOOT_M4_AT_INIT=n
17 changes: 17 additions & 0 deletions variants/arduino_opta_stm32h747xx_m7/arduino_opta_stm32h747xx_m7.conf
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Expand Up @@ -90,3 +90,20 @@ CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN=7168
CONFIG_MBEDTLS_HASH_ALL_ENABLED=y
CONFIG_MBEDTLS_CMAC=y

CONFIG_BT=y
CONFIG_BT_HCI_RAW=y
CONFIG_BT_HCI_RAW_H4=y
CONFIG_BT_HCI_RAW_H4_ENABLE=y
CONFIG_BT_BUF_ACL_RX_SIZE=255
CONFIG_BT_BUF_CMD_TX_SIZE=255
CONFIG_BT_BUF_EVT_DISCARDABLE_SIZE=255
CONFIG_BT_MAX_CONN=4
CONFIG_BT_CTLR_ADV_EXT=y
CONFIG_BT_CTLR_ADV_PERIODIC=y
CONFIG_BT_CTLR_DTM_HCI=y
CONFIG_CYW4343W_MURATA_1DX=y
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048
CONFIG_BT_RX_STACK_SIZE=4096
CONFIG_BT_HCI_TX_STACK_SIZE=4096

CONFIG_STM32H7_BOOT_M4_AT_INIT=n
2 changes: 1 addition & 1 deletion variants/arduino_opta_stm32h747xx_m7/arduino_opta_stm32h747xx_m7.overlay
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Expand Up @@ -23,7 +23,7 @@

&i2c1 {
status = "okay";
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_FAST>;
};
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20 changes: 19 additions & 1 deletion variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.conf
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Expand Up @@ -95,4 +95,22 @@ CONFIG_VIDEO_BUFFER_POOL_ALIGN=32
CONFIG_VIDEO_BUFFER_USE_SHARED_MULTI_HEAP=y
CONFIG_VIDEO_BUFFER_SMH_ATTRIBUTE=2
CONFIG_FLASH=y
CONFIG_STM32H7_BOOT_M4_AT_INIT=n


CONFIG_BT=y
CONFIG_BT_HCI_RAW=y
CONFIG_BT_HCI_RAW_H4=y
CONFIG_BT_HCI_RAW_H4_ENABLE=y
CONFIG_BT_BUF_ACL_RX_SIZE=255
CONFIG_BT_BUF_CMD_TX_SIZE=255
CONFIG_BT_BUF_EVT_DISCARDABLE_SIZE=255
CONFIG_BT_MAX_CONN=4
CONFIG_BT_CTLR_ADV_EXT=y
CONFIG_BT_CTLR_ADV_PERIODIC=y
CONFIG_BT_CTLR_DTM_HCI=y
CONFIG_CYW4343W_MURATA_1DX=y
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048
CONFIG_BT_RX_STACK_SIZE=4096
CONFIG_BT_HCI_TX_STACK_SIZE=4096

CONFIG_STM32H7_BOOT_M4_AT_INIT=n
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