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hathachhathach
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fix build warnings
1 parent 8af8869 commit 65d6acd

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9 files changed

+47
-39
lines changed

9 files changed

+47
-39
lines changed

‎hw/bsp/family_support.cmake

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -177,6 +177,8 @@ function(family_add_freertos TARGET)
177177
target_include_directories(freertos_config INTERFACE
178178
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig
179179
)
180+
# add board definition to freertos_config mostly for SystemCoreClock
181+
target_link_libraries(freertos_config INTERFACE board_${BOARD})
180182
endif()
181183

182184
# freertos kernel should be generic as freertos_config however, CMAKE complains with missing variable

‎hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -44,15 +44,14 @@
4444

4545
// skip if included from IAR assembler
4646
#ifndef __IASMARM__
47-
// FIXME cause redundant-decls warnings
48-
extern uint32_t SystemCoreClock;
47+
#include "fsl_device_registers.h"
4948
#endif
5049

5150
/* Cortex M23/M33 port configuration. */
52-
#define configENABLE_MPU 0
53-
#define configENABLE_FPU 1
54-
#define configENABLE_TRUSTZONE 0
55-
#define configMINIMAL_SECURE_STACK_SIZE (1024)
51+
#define configENABLE_MPU 0
52+
#define configENABLE_FPU 1
53+
#define configENABLE_TRUSTZONE 0
54+
#define configMINIMAL_SECURE_STACK_SIZE (1024)
5655

5756
#define configUSE_PREEMPTION 1
5857
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0

‎hw/bsp/imxrt/family.cmake

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -103,10 +103,6 @@ function(family_configure_example TARGET)
103103
#---------- Port Specific ----------
104104
# These files are built for each example since it depends on example's tusb_config.h
105105
target_sources(${TARGET} PUBLIC
106-
# TinyUSB Port
107-
${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
108-
${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
109-
${TOP}/src/portable/ehci/ehci.c
110106
# BSP
111107
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
112108
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
@@ -121,6 +117,14 @@ function(family_configure_example TARGET)
121117
# Add TinyUSB
122118
family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX)
123119

120+
# Add TinyUSB Port source
121+
target_sources(${TARGET}-tinyusb PUBLIC
122+
${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
123+
${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
124+
${TOP}/src/portable/ehci/ehci.c
125+
)
126+
target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
127+
124128
# Link dependencies
125129
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
126130

‎src/device/dcd.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -108,15 +108,15 @@ typedef struct TU_ATTR_ALIGNED(4)
108108

109109
// clean/flush data cache: write cache -> memory.
110110
// Required before an DMA TX transfer to make sure data is in memory
111-
void dcd_dcache_clean(void* addr, uint32_t data_size) TU_ATTR_WEAK;
111+
void dcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
112112

113113
// invalidate data cache: mark cache as invalid, next read will read from memory
114114
// Required BOTH before and after an DMA RX transfer
115-
void dcd_dcache_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK;
115+
void dcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
116116

117117
// clean and invalidate data cache
118118
// Required before an DMA transfer where memory is both read/write by DMA
119-
void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK;
119+
void dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
120120

121121
//--------------------------------------------------------------------+
122122
// Controller API

‎src/host/hcd.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -110,15 +110,15 @@ typedef struct
110110

111111
// clean/flush data cache: write cache -> memory.
112112
// Required before an DMA TX transfer to make sure data is in memory
113-
void hcd_dcache_clean(void* addr, uint32_t data_size) TU_ATTR_WEAK;
113+
void hcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
114114

115115
// invalidate data cache: mark cache as invalid, next read will read from memory
116116
// Required BOTH before and after an DMA RX transfer
117-
void hcd_dcache_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK;
117+
void hcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
118118

119119
// clean and invalidate data cache
120120
// Required before an DMA transfer where memory is both read/write by DMA
121-
void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK;
121+
void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
122122

123123
//--------------------------------------------------------------------+
124124
// Controller API

‎src/portable/chipidea/ci_hs/ci_hs_imxrt.h

Lines changed: 13 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -64,25 +64,28 @@ static const ci_hs_controller_t _ci_controller[] =
6464
#define CI_HCD_INT_DISABLE(_p) NVIC_DisableIRQ(_ci_controller[_p].irqnum)
6565

6666
//------------- DCache -------------//
67-
TU_ATTR_ALWAYS_INLINE static inline bool imxrt_is_cache_mem(uint32_t addr) {
67+
TU_ATTR_ALWAYS_INLINE static inline bool imxrt_is_cache_mem(uintptr_t addr) {
6868
return !(0x20000000 <= addr && addr < 0x20100000);
6969
}
7070

71-
TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void* addr, uint32_t data_size) {
72-
if (imxrt_is_cache_mem((uint32_t) addr)) {
73-
SCB_CleanDCache_by_Addr((uint32_t *) addr, (int32_t) data_size);
71+
TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void const* addr, uint32_t data_size) {
72+
const uintptr_t addr32 = (uintptr_t) addr;
73+
if (imxrt_is_cache_mem(addr32)) {
74+
SCB_CleanDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size);
7475
}
7576
}
7677

77-
TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void* addr, uint32_t data_size) {
78-
if (imxrt_is_cache_mem((uint32_t) addr)) {
79-
SCB_InvalidateDCache_by_Addr(addr, (int32_t) data_size);
78+
TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void const* addr, uint32_t data_size) {
79+
const uintptr_t addr32 = (uintptr_t) addr;
80+
if (imxrt_is_cache_mem(addr32)) {
81+
SCB_InvalidateDCache_by_Addr((void*) addr32, (int32_t) data_size);
8082
}
8183
}
8284

83-
TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean_invalidate(void* addr, uint32_t data_size) {
84-
if (imxrt_is_cache_mem((uint32_t) addr)) {
85-
SCB_CleanInvalidateDCache_by_Addr(addr, (int32_t) data_size);
85+
TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
86+
const uintptr_t addr32 = (uintptr_t) addr;
87+
if (imxrt_is_cache_mem(addr32)) {
88+
SCB_CleanInvalidateDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size);
8689
}
8790
}
8891

‎src/portable/chipidea/ci_hs/dcd_ci_hs.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -34,15 +34,15 @@
3434
#if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
3535
#include "ci_hs_imxrt.h"
3636

37-
void dcd_dcache_clean(void* addr, uint32_t data_size) {
37+
void dcd_dcache_clean(void const* addr, uint32_t data_size) {
3838
imxrt_dcache_clean(addr, data_size);
3939
}
4040

41-
void dcd_dcache_invalidate(void* addr, uint32_t data_size) {
41+
void dcd_dcache_invalidate(void const* addr, uint32_t data_size) {
4242
imxrt_dcache_invalidate(addr, data_size);
4343
}
4444

45-
void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
45+
void dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
4646
imxrt_dcache_clean_invalidate(addr, data_size);
4747
}
4848

@@ -58,15 +58,15 @@
5858
#error "Unsupported MCUs"
5959
#endif
6060

61-
TU_ATTR_WEAK void dcd_dcache_clean(void* addr, uint32_t data_size) {
61+
TU_ATTR_WEAK void dcd_dcache_clean(void const* addr, uint32_t data_size) {
6262
(void) addr; (void) data_size;
6363
}
6464

65-
TU_ATTR_WEAK void dcd_dcache_invalidate(void* addr, uint32_t data_size) {
65+
TU_ATTR_WEAK void dcd_dcache_invalidate(void const* addr, uint32_t data_size) {
6666
(void) addr; (void) data_size;
6767
}
6868

69-
TU_ATTR_WEAK void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
69+
TU_ATTR_WEAK void dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
7070
(void) addr; (void) data_size;
7171
}
7272
#endif

‎src/portable/chipidea/ci_hs/hcd_ci_hs.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -41,15 +41,15 @@
4141
#if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
4242
#include "ci_hs_imxrt.h"
4343

44-
void hcd_dcache_clean(void* addr, uint32_t data_size) {
44+
void hcd_dcache_clean(void const* addr, uint32_t data_size) {
4545
imxrt_dcache_clean(addr, data_size);
4646
}
4747

48-
void hcd_dcache_invalidate(void* addr, uint32_t data_size) {
48+
void hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
4949
imxrt_dcache_invalidate(addr, data_size);
5050
}
5151

52-
void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
52+
void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
5353
imxrt_dcache_clean_invalidate(addr, data_size);
5454
}
5555

‎src/portable/ehci/ehci.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -162,15 +162,15 @@ static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes)
162162
static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type);
163163
static inline ehci_link_t* list_next (ehci_link_t const *p_link);
164164

165-
TU_ATTR_WEAK void hcd_dcache_clean(void* addr, uint32_t data_size) {
165+
TU_ATTR_WEAK void hcd_dcache_clean(void const* addr, uint32_t data_size) {
166166
(void) addr; (void) data_size;
167167
}
168168

169-
TU_ATTR_WEAK void hcd_dcache_invalidate(void* addr, uint32_t data_size) {
169+
TU_ATTR_WEAK void hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
170170
(void) addr; (void) data_size;
171171
}
172172

173-
TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
173+
TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
174174
(void) addr; (void) data_size;
175175
}
176176

@@ -461,7 +461,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
461461
qtd_init(td, setup_packet, 8);
462462
td->pid = EHCI_PID_SETUP;
463463

464-
hcd_dcache_clean((void *) setup_packet, 8);
464+
hcd_dcache_clean(setup_packet, 8);
465465

466466
// attach TD to QHD -> start transferring
467467
qhd_attach_qtd(qhd, td);

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