[DO_NOT_MERGE][RVY] Add a call to RISCV_MC::verifyInstructionPredicates

This ensures the broken Asmparser expansions trigger a crash

Author: arichardson

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

@@ -3546,6 +3546,8 @@ void RISCVAsmParser::emitToStreamer(MCStreamer &S, const MCInst &Inst) {
     Res = RISCVRVC::compress(CInst, Inst, STI);
   if (Res)
     ++RISCVNumInstrsCompressed;
+  // This catches the broken CHERI expansions
+  RISCV_MC::verifyInstructionPredicates(Inst.getOpcode(), STI.getFeatureBits());
   S.emitInstruction((Res ? CInst : Inst), STI);
 }
 

llvm/test/MC/RISCV/rvy/rvy-cap-mode-invalid.s

@@ -0,0 +1,15 @@
+# RUN: not llvm-mc --triple riscv32 --mattr=+experimental-y,+cap-mode <%s 2>&1 \
+# RUN:     | FileCheck %s --check-prefixes=CHECK,CHECK-32 '--implicit-check-not=error:'
+# RUN: not llvm-mc --triple riscv64 --mattr=+experimental-y,+cap-mode <%s 2>&1 \
+# RUN:     | FileCheck %s --check-prefixes=CHECK,CHECK-64 '--implicit-check-not=error:'
+
+# TODO: support expanding these pseudos
+lw a0, sym
+ld a0, sym
+# CHECK-32: [[#@LINE-1]]:1: error: instruction requires the following: 'Zilsd' (Load/Store pair instructions)
+ly a0, sym
+# CHECK: [[#@LINE-1]]:8: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo specifier or an integer in the range [-2048, 2047]
+
+.data
+sym:
+.4byte 0