sunxi a523: Adding support for PCIe, SPI Flash and Iommu

config/kernel/linux-sunxi64-edge.config

@@ -579,6 +579,7 @@ CONFIG_PCI=y
 CONFIG_PCIEPORTBUS=y
 CONFIG_PCI_HOST_GENERIC=y
 CONFIG_PCIE_DW_PLAT_HOST=y
+CONFIG_PCIE_SUN55I_RC=y
 CONFIG_UEVENT_HELPER=y
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
@@ -603,7 +604,7 @@ CONFIG_MTD_CMDLINE_PARTS=m
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_OOPS=m
 CONFIG_MTD_PARTITIONED_MASTER=y
-CONFIG_MTD_SPI_NOR=m
+CONFIG_MTD_SPI_NOR=y
 CONFIG_OF_OVERLAY=y
 CONFIG_BLK_DEV_PCIESSD_MTIP32XX=m
 CONFIG_ZRAM=m
@@ -1137,11 +1138,13 @@ CONFIG_I2C_SLAVE_EEPROM=m
 CONFIG_I3C=m
 CONFIG_DW_I3C_MASTER=m
 CONFIG_SPI=y
+CONFIG_SPI_DEBUG=y
 CONFIG_SPI_DESIGNWARE=m
 CONFIG_SPI_DW_DMA=y
 CONFIG_SPI_DW_PCI=m
 CONFIG_SPI_DW_MMIO=m
-CONFIG_SPI_GPIO=m
+CONFIG_SPI_GPIO=y
+CONFIG_SPI_PL022=y
 CONFIG_SPI_SUN4I=y
 CONFIG_SPI_SUN6I=y
 CONFIG_SPI_MUX=m
@@ -2223,6 +2226,7 @@ CONFIG_ARM_SMMU_V3=m
 CONFIG_ARM_SMMU_V3_SVA=y
 CONFIG_IOMMUFD=m
 CONFIG_SUN50I_IOMMU=y
+CONFIG_SUN55I_IOMMU=y
 CONFIG_REMOTEPROC=y
 CONFIG_REMOTEPROC_CDEV=y
 CONFIG_SUN50I_H6_PRCM_PPU=m
@@ -2644,6 +2648,7 @@ CONFIG_PHY_CAN_TRANSCEIVER=m
 CONFIG_PHY_SUN4I_USB=y
 CONFIG_PHY_SUN9I_USB=y
 CONFIG_PHY_SUN50I_USB3=y
+CONFIG_AW_INNO_COMBOPHY=y
 CONFIG_ARM_CCI_PMU=y
 # CONFIG_ARM_CCI400_PMU is not set
 # CONFIG_ARM_CCI5xx_PMU is not set

patch/kernel/archive/sunxi-6.18/patches.armbian/arm64-dts-sun55i-a527-cubie-a5e-enable-usbc-pcie-combophy.patch

@@ -0,0 +1,87 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Marvin Wewer <mwewer37@proton.me>
+Date: Sun, 11 Jan 2026 12:11:10 +0000
+Subject: arm64: dts: allwinner: a527-cubie-a5e: enable PCIe/USB-C combophy
+
+Signed-off-by: Marvin Wewer <mwewer37@proton.me>
+---
+---
+ arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts | 58 ++++++++++
+ 1 file changed, 58 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
+index 111111111111..222222222222 100644
+--- a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
++++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
+@@ -76,6 +76,39 @@ reg_usb_vbus: vbus {
+ 		gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>;	/* PL8 */
+ 		enable-active-high;
+ 	};
++
++	reg_pcie_vcc3v3: regulator-pcie-vcc3v3 {
++		compatible = "regulator-fixed";
++		regulator-name = "pcie-3v3";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-enable-ramp-delay = <1000>;
++		regulator-always-on;
++		regulator-boot-on;
++		gpio = <&r_pio 0 11 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++	};
++
++	gma340_oe: gma340-oe {
++		compatible = "regulator-fixed";
++		regulator-name = "gma340-oe";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-always-on;
++		regulator-boot-on;
++		gpio = <&pio 1 7 GPIO_ACTIVE_LOW>;
++	};
++
++	gma340_pcie: gma340-pcie {
++		compatible = "regulator-fixed";
++		regulator-name = "gma340-pcie";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-always-on;
++		regulator-boot-on;
++		gpio = <&pio 1 6 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++	};
+ };
+
+ &ehci0 {
+@@ -434,3 +467,28 @@ w25q128: flash@0 {
+ 		status = "okay";
+ 	};
+ };
++
++/* PCIE and USB Switch */
++&combophy {
++	resets = <&ccu RST_BUS_PCIE_USB3>;
++	phy_use_sel = <0>; /* 0:PCIE; 1:USB3 */
++	status = "okay";
++};
++
++&pcie {
++	reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>;
++	wake-gpios = <&pio 7 12 GPIO_ACTIVE_HIGH>;
++	num-lanes  = <1>;
++	clk-freq-100M;
++	pcie3v3-supply = <&reg_pcie_vcc3v3>;
++	status = "okay";
++};
++
++&usbc1 {
++	device_type = "usbc1";
++	usb_regulator_io = "nocare";
++	usb_wakeup_suspend = <1>;
++	wakeup-source;
++	status = "okay";
++};
++
+-- 
+Armbian
+

patch/kernel/archive/sunxi-6.18/patches.armbian/arm64-dts-sun55i-dtsi-add-iommu-usbc-pcie-combophy-nodes.patch

@@ -0,0 +1,122 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Marvin Wewer <mwewer37@proton.me>
+Date: Mon, 5 Jan 2026 21:41:18 +0000
+Subject: arm64: dts: allwinner: sun55i-a523: add iommu and PCIe/USB-C nodes
+
+Signed-off-by: Marvin Wewer <mwewer37@proton.me>
+---
+ arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 84 ++++++++++
+ 1 file changed, 84 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+index 111111111111..222222222222 100644
+--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+@@ -12,6 +12,7 @@
+ #include <dt-bindings/power/allwinner,sun55i-a523-ppu.h>
+ #include <dt-bindings/power/allwinner,sun55i-a523-pck-600.h>
+ #include <dt-bindings/thermal/thermal.h>
++#include <dt-bindings/phy/phy.h>
+
+ / {
+ 	interrupt-parent = <&gic>;
+@@ -113,6 +114,17 @@ timer {
+ 			     <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ 	};
+
++	iommu: iommu@2010000 {
++		compatible = "allwinner,sun55i-a523-iommu";
++		reg = <0x0 0x02010000 0x0 0x1000>;
++		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
++		interrupt-names = "iommu-irq";
++		clocks = <&ccu CLK_IOMMU>;
++		clock-names = "iommu";
++		/* clock-frequency = <24000000>; */
++		#iommu-cells = <2>;
++	};
++
+ 	soc {
+ 		compatible = "simple-bus";
+ 		#address-cells = <1>;
+@@ -844,6 +856,78 @@ gmac1_mtl_tx_setup: tx-queues-config {
+ 			};
+ 		};
+
++usbc1: usbc1@11 {
++	device_type = "usbc1";
++	reg = <0x11 0x1000>;
++	usb_regulator_io = "nocare";
++	usb_wakeup_suspend = <0>;
++	status = "disabled";
++};
++
++combophy: phy@4f00000 {
++	compatible = "allwinner,inno-combphy";
++	reg = <0x04f00000 0x80000>, /* Sub-System Application Registers */
++		  <0x04f80000 0x80000>; /* Combo INNO PHY Registers */
++	reg-names = "phy-ctl", "phy-clk";
++	power-domains = <&pck600 PD_PCIE>;
++	phy_refclk_sel = <0>; /* 0:internal clk; 1:external clk */
++	clocks = <&ccu CLK_USB3_REF>, <&ccu CLK_PLL_PERIPH0_200M>;
++	clock-names = "phyclk_ref","refclk_par";
++	resets = <&ccu RST_BUS_PCIE_USB3>;
++	reset-names = "phy_rst";
++	#phy-cells = <1>;
++	status = "disabled";
++};
++
++pcie: pcie@4800000 {
++	compatible = "allwinner,sunxi-pcie-v210-rc";
++	#address-cells = <3>;
++	#size-cells = <2>;
++	bus-range = <0x0 0xff>;
++	reg = <0x04800000 0x480000>;
++	reg-names = "dbi";
++	device_type = "pci";
++	ranges = <0x00000800 0 0x20000000 0x20000000 0 0x01000000
++		  0x81000000 0 0x21000000 0x21000000 0 0x01000000
++		  0x82000000 0 0x22000000 0x22000000 0 0x0e000000>;
++	num-lanes = <1>;
++	phys = <&combophy PHY_TYPE_PCIE>;
++	phy-names = "pcie-phy";
++	interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
++			 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
++			 <GIC_SPI 98  IRQ_TYPE_LEVEL_HIGH>,
++			 <GIC_SPI 99  IRQ_TYPE_LEVEL_HIGH>,
++			 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
++			 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
++			 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
++			 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
++			 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
++			 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
++	interrupt-names = "msi", "sii", "edma-w0", "edma-w1", "edma-w2", "edma-w3",
++			  "edma-r0", "edma-r1", "edma-r2", "edma-r3";
++	#interrupt-cells = <1>;
++	interrupt-map-mask = <0 0 0 7>;
++	interrupt-map = <0 0 0 1 &pcie_intc 0>,
++					<0 0 0 2 &pcie_intc 1>,
++					<0 0 0 3 &pcie_intc 2>,
++					<0 0 0 4 &pcie_intc 3>;
++	num-edma = <4>;
++	max-link-speed = <2>;
++	num-ib-windows = <8>;
++	num-ob-windows = <8>;
++	linux,pci-domain = <0>;
++	power-domains = <&pck600 PD_PCIE>;
++	clocks = <&osc24M>, <&ccu CLK_PCIE_AUX>;
++	clock-names = "hosc", "pclk_aux";
++	status = "disabled";
++
++	pcie_intc: legacy-interrupt-controller {
++		interrupt-controller;
++		#address-cells = <0>;
++		#interrupt-cells = <1>;
++	};
++};
++
+ 		ppu: power-controller@7001400 {
+ 			compatible = "allwinner,sun55i-a523-ppu";
+ 			reg = <0x07001400 0x400>;
+-- 
+Armbian
+

patch/kernel/archive/sunxi-6.18/patches.armbian/arm64-dts-sun55i-t527-orangepi-4a-enable-pcie-combophy.patch

@@ -0,0 +1,39 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Marvin Wewer <mwewer37@proton.me>
+Date: Tue, 6 Jan 2026 13:46:53 +0000
+Subject: arm64: dts: allwinner: t527-orangepi-4a: enable PCIe combophy
+
+Signed-off-by: Marvin Wewer <mwewer37@proton.me>
+---
+ arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts | 15 ++++++++++
+ 1 file changed, 15 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
+index 111111111111..222222222222 100644
+--- a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
++++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
+@@ -442,6 +442,21 @@ bluetooth {
+ 	};
+ };
+
++&combophy {
++       resets = <&ccu RST_BUS_PCIE_USB3>;
++    	phy_use_sel = <0>;
++	status = "okay";
++};
++
++&pcie {
++	reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>;
++	wake-gpios = <&pio 7 12 GPIO_ACTIVE_HIGH>;
++	num-lanes = <2>;
++	clk-freq-100M;
++	pcie3v3-supply = <&reg_pcie_vcc3v3>;
++	status = "okay";
++};
++
+ &usb_otg {
+ 	/*
+ 	 * The OTG controller is connected to one of the type-A ports.
+-- 
+Armbian
+

patch/kernel/archive/sunxi-6.18/patches.armbian/drv-clk-sunxi-ng-fix-clock-handling-for-ccu-sun55i-a523.patch

@@ -0,0 +1,64 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Marvin Wewer <mwewer37@proton.me>
+Date: Tue, 9 Dec 2025 16:43:16 +0000
+Subject: clk: sunxi-ng: add A523 USB3 ref clock and reset
+
+Signed-off-by: Marvin Wewer <mwewer37@proton.me>
+---
+ drivers/clk/sunxi-ng/ccu-sun55i-a523.c      | 13 +++++++++-
+ include/dt-bindings/clock/sun55i-a523-ccu.h |  1 +
+ 3 files changed, 13 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/clk/sunxi-ng/ccu-sun55i-a523.c b/drivers/clk/sunxi-ng/ccu-sun55i-a523.c
+index 111111111111..222222222222 100644
+--- a/drivers/clk/sunxi-ng/ccu-sun55i-a523.c
++++ b/drivers/clk/sunxi-ng/ccu-sun55i-a523.c
+@@ -1186,6 +1186,15 @@ static SUNXI_CCU_MUX_DATA_WITH_GATE(fanout2_clk, "fanout2", fanout_parents,
+ 				    BIT(23),	/* gate */
+ 				    0);
+
++static const struct clk_parent_data usb3_ref_parents[] = { { .fw_name = "hosc" }, { .hw = &pll_periph0_200M_clk.hw }, { .hw = &pll_periph1_200M_clk.hw } };
++static SUNXI_CCU_M_DATA_WITH_MUX_GATE(usb3_ref_clk, "usb3-ref",
++		usb3_ref_parents, 0x0A84,
++		0, 5,	/* M */
++		24, 3,	/* mux */
++		BIT(31),	/* gate */
++		0);
++
++
+ /*
+  * Contains all clocks that are controlled by a hardware register. They
+  * have a (sunxi) .common member, which needs to be initialised by the common
+@@ -1354,6 +1363,7 @@ static struct ccu_common *sun55i_a523_ccu_clks[] = {
+ 	&fanout0_clk.common,
+ 	&fanout1_clk.common,
+ 	&fanout2_clk.common,
++	&usb3_ref_clk.common,
+ };
+
+ static struct clk_hw_onecell_data sun55i_a523_hw_clks = {
+@@ -1538,8 +1548,9 @@ static struct clk_hw_onecell_data sun55i_a523_hw_clks = {
+ 		[CLK_FANOUT1]		= &fanout1_clk.common.hw,
+ 		[CLK_FANOUT2]		= &fanout2_clk.common.hw,
+ 		[CLK_NPU]		= &npu_clk.common.hw,
++		[CLK_USB3_REF]		= &usb3_ref_clk.common.hw,
+ 	},
+-	.num	= CLK_NPU + 1,
++	.num	= CLK_USB3_REF + 1,
+ };
+
+ static struct ccu_reset_map sun55i_a523_ccu_resets[] = {
+diff --git a/include/dt-bindings/clock/sun55i-a523-ccu.h b/include/dt-bindings/clock/sun55i-a523-ccu.h
+index 111111111111..222222222222 100644
+--- a/include/dt-bindings/clock/sun55i-a523-ccu.h
++++ b/include/dt-bindings/clock/sun55i-a523-ccu.h
+@@ -186,5 +186,6 @@
+ #define CLK_FANOUT1		177
+ #define CLK_FANOUT2		178
+ #define CLK_NPU			179
++#define CLK_USB3_REF		180
+
+ #endif /* _DT_BINDINGS_CLK_SUN55I_A523_CCU_H_ */
+-- 
+Armbian
+