Initial support for kernel 6.18 on Ayn odin2

config/boards/ayn-odin2.csc

@@ -3,7 +3,7 @@ declare -g BOARD_NAME="Ayn Odin2"
 declare -g BOARD_VENDOR="ayntec"
 declare -g BOARD_MAINTAINER="FantasyGmm"
 declare -g BOARDFAMILY="sm8550"
-declare -g KERNEL_TARGET="current"
+declare -g KERNEL_TARGET="current,edge"
 declare -g KERNEL_TEST_TARGET="edge"
 declare -g EXTRAWIFI="no"
 declare -g BOOTCONFIG="none"

config/kernel/linux-sm8550-edge.config

@@ -1,4 +1,4 @@
-# Armbian defconfig generated with 6.12
+# Armbian defconfig generated with 6.18
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_DEFAULT_HOSTNAME="@DEVICENAME@"
 CONFIG_SYSVIPC=y
@@ -42,8 +42,6 @@ CONFIG_ARCH_QCOM=y
 # CONFIG_NVIDIA_CARMEL_CNP_ERRATUM is not set
 # CONFIG_ROCKCHIP_ERRATUM_3588001 is not set
 CONFIG_ARM64_VA_BITS_48=y
-CONFIG_SCHED_MC=y
-CONFIG_SCHED_SMT=y
 CONFIG_NUMA=y
 CONFIG_PARAVIRT=y
 CONFIG_COMPAT=y
@@ -74,7 +72,6 @@ CONFIG_ACPI_APEI_MEMORY_FAILURE=y
 CONFIG_ACPI_APEI_EINJ=y
 CONFIG_VIRTUALIZATION=y
 CONFIG_KVM=y
-CONFIG_JUMP_LABEL=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_BLK_DEV_INTEGRITY=y
@@ -83,7 +80,6 @@ CONFIG_PARTITION_ADVANCED=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_BINFMT_MISC=y
 CONFIG_ZSWAP=y
-CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_MEMORY_HOTPLUG=y
 CONFIG_MEMORY_HOTREMOVE=y
@@ -145,18 +141,22 @@ CONFIG_NETFILTER_XT_TARGET_AUDIT=m
 CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
 CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
 CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+CONFIG_NETFILTER_XT_TARGET_CT=m
 CONFIG_NETFILTER_XT_TARGET_DSCP=m
+CONFIG_NETFILTER_XT_TARGET_HL=m
 CONFIG_NETFILTER_XT_TARGET_HMARK=m
 CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
 CONFIG_NETFILTER_XT_TARGET_LED=m
 CONFIG_NETFILTER_XT_TARGET_LOG=m
 CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_NAT=m
+CONFIG_NETFILTER_XT_TARGET_NETMAP=m
 CONFIG_NETFILTER_XT_TARGET_NFLOG=m
 CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
+CONFIG_NETFILTER_XT_TARGET_REDIRECT=m
+CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m
 CONFIG_NETFILTER_XT_TARGET_TEE=m
 CONFIG_NETFILTER_XT_TARGET_TPROXY=m
-CONFIG_NETFILTER_XT_TARGET_TRACE=m
 CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
 CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
 CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
@@ -221,15 +221,7 @@ CONFIG_NFT_DUP_IPV4=m
 CONFIG_NFT_FIB_IPV4=m
 CONFIG_NF_TABLES_ARP=y
 CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_FILTER=m
 CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_NAT=m
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_SECURITY=m
 CONFIG_NFT_DUP_IPV6=m
 CONFIG_NFT_FIB_IPV6=m
 CONFIG_IP6_NF_IPTABLES=m
@@ -243,15 +235,8 @@ CONFIG_IP6_NF_MATCH_MH=m
 CONFIG_IP6_NF_MATCH_RPFILTER=m
 CONFIG_IP6_NF_MATCH_RT=m
 CONFIG_IP6_NF_MATCH_SRH=m
-CONFIG_IP6_NF_TARGET_HL=m
-CONFIG_IP6_NF_FILTER=m
 CONFIG_IP6_NF_TARGET_REJECT=m
 CONFIG_IP6_NF_TARGET_SYNPROXY=m
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_RAW=m
-CONFIG_IP6_NF_SECURITY=m
-CONFIG_IP6_NF_NAT=m
-CONFIG_IP6_NF_TARGET_MASQUERADE=m
 CONFIG_IP6_NF_TARGET_NPT=m
 CONFIG_NF_TABLES_BRIDGE=m
 CONFIG_NFT_BRIDGE_META=m
@@ -289,7 +274,9 @@ CONFIG_BT_HCIUART=m
 CONFIG_BT_HCIUART_LL=y
 CONFIG_BT_HCIUART_QCA=y
 CONFIG_CFG80211=m
+CONFIG_CFG80211_WEXT=y
 CONFIG_MAC80211=m
+CONFIG_MAC80211_MESH=y
 CONFIG_MAC80211_LEDS=y
 CONFIG_RFKILL=m
 CONFIG_RFKILL_INPUT=y
@@ -364,15 +351,14 @@ CONFIG_QCOM_COINCELL=m
 CONFIG_QCOM_FASTRPC=y
 CONFIG_SRAM=y
 CONFIG_PCI_ENDPOINT_TEST=m
+CONFIG_NTSYNC=m
 CONFIG_EEPROM_AT24=m
 CONFIG_EEPROM_AT25=m
-CONFIG_EEPROM_93CX6=y
 CONFIG_UACCE=m
 CONFIG_SCSI=y
 # CONFIG_SCSI_PROC_FS is not set
 CONFIG_BLK_DEV_SD=y
 CONFIG_MD=y
-# CONFIG_MD_BITMAP_FILE is not set
 CONFIG_NETDEVICES=y
 CONFIG_DUMMY=m
 CONFIG_WIREGUARD=m
@@ -608,18 +594,16 @@ CONFIG_VIDEO_QCOM_VENUS=m
 CONFIG_DRM=y
 CONFIG_DRM_LOAD_EDID_FIRMWARE=y
 CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV=y
-CONFIG_DRM_I2C_CH7006=m
-CONFIG_DRM_I2C_SIL164=m
-CONFIG_DRM_I2C_NXP_TDA998X=m
+CONFIG_DRM_SIMPLEDRM=y
 CONFIG_DRM_MSM=y
 CONFIG_DRM_PANEL_CHIPONE_ICNA3512=y
 CONFIG_DRM_PANEL_LVDS=m
 CONFIG_DRM_PANEL_EDP=y
 CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_SYNAPTICS_TD4328=y
 CONFIG_DRM_DISPLAY_CONNECTOR=y
+CONFIG_DRM_I2C_NXP_TDA998X=m
 CONFIG_DRM_SIMPLE_BRIDGE=m
-CONFIG_DRM_SIMPLEDRM=y
 CONFIG_FB=y
 CONFIG_FB_EFI=y
 CONFIG_FB_MODE_HELPERS=y
@@ -681,10 +665,10 @@ CONFIG_HID_PLAYSTATION=y
 CONFIG_PLAYSTATION_FF=y
 CONFIG_HID_SONY=y
 CONFIG_SONY_FF=y
-CONFIG_USB_HIDDEV=y
 CONFIG_I2C_HID_ACPI=m
 CONFIG_I2C_HID_OF=m
 CONFIG_I2C_HID_OF_ELAN=m
+CONFIG_USB_HIDDEV=y
 CONFIG_USB_ULPI_BUS=y
 CONFIG_USB_CONN_GPIO=y
 CONFIG_USB_OTG=y
@@ -852,12 +836,13 @@ CONFIG_IIO_TRIGGERED_BUFFER=m
 CONFIG_QCOM_SPMI_VADC=y
 CONFIG_QCOM_SPMI_ADC5=y
 CONFIG_PWM=y
-CONFIG_PWM_SN3112=y
+CONFIG_PWM_SN3112=m
 CONFIG_QCOM_PDC=y
 CONFIG_QCOM_MPM=y
 CONFIG_RESET_GPIO=m
 CONFIG_RESET_QCOM_AOSS=y
 CONFIG_RESET_QCOM_PDC=y
+CONFIG_PHY_SNPS_EUSB2=y
 CONFIG_PHY_CAN_TRANSCEIVER=m
 CONFIG_PHY_CADENCE_TORRENT=m
 CONFIG_PHY_CADENCE_DPHY_RX=m
@@ -868,7 +853,6 @@ CONFIG_PHY_QCOM_PCIE2=m
 CONFIG_PHY_QCOM_QMP=y
 CONFIG_PHY_QCOM_QMP_PCIE_8996=m
 CONFIG_PHY_QCOM_QUSB2=m
-CONFIG_PHY_QCOM_SNPS_EUSB2=y
 CONFIG_PHY_QCOM_EUSB2_REPEATER=y
 CONFIG_PHY_QCOM_M31_USB=m
 CONFIG_PHY_QCOM_USB_HS=m
@@ -898,7 +882,6 @@ CONFIG_TEE=y
 CONFIG_OPTEE=y
 CONFIG_MUX_GPIO=m
 CONFIG_MUX_MMIO=m
-CONFIG_SLIM_QCOM_CTRL=m
 CONFIG_SLIM_QCOM_NGD_CTRL=m
 CONFIG_INTERCONNECT_QCOM=y
 CONFIG_INTERCONNECT_QCOM_OSM_L3=y
@@ -952,7 +935,6 @@ CONFIG_SECURITY=y
 CONFIG_SECURITY_APPARMOR=y
 CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,bpf"
 CONFIG_CRYPTO_USER=y
-CONFIG_CRYPTO_TEST=m
 CONFIG_CRYPTO_ECDH=y
 CONFIG_CRYPTO_DES=m
 CONFIG_CRYPTO_ARC4=m
@@ -963,14 +945,10 @@ CONFIG_CRYPTO_MICHAEL_MIC=y
 CONFIG_CRYPTO_ANSI_CPRNG=y
 CONFIG_CRYPTO_USER_API_RNG=m
 CONFIG_CRYPTO_GHASH_ARM64_CE=y
-CONFIG_CRYPTO_SHA1_ARM64_CE=y
-CONFIG_CRYPTO_SHA2_ARM64_CE=y
-CONFIG_CRYPTO_SHA512_ARM64_CE=m
 CONFIG_CRYPTO_SHA3_ARM64=m
 CONFIG_CRYPTO_SM3_ARM64_CE=m
 CONFIG_CRYPTO_AES_ARM64_BS=m
 CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
-CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y
 CONFIG_CRYPTO_DEV_QCE=y
 CONFIG_CRYPTO_DEV_QCOM_RNG=y
 CONFIG_CRYPTO_DEV_CCREE=m
@@ -981,7 +959,6 @@ CONFIG_CRYPTO_DEV_HISI_TRNG=m
 CONFIG_CRYPTO_DEV_AMLOGIC_GXL=m
 CONFIG_PACKING=y
 CONFIG_INDIRECT_PIO=y
-CONFIG_CRC_CCITT=m
 CONFIG_DMA_RESTRICTED_POOL=y
 CONFIG_DMA_CMA=y
 CONFIG_CMA_SIZE_MBYTES=32
@@ -991,11 +968,8 @@ CONFIG_CONSOLE_LOGLEVEL_DEFAULT=4
 CONFIG_CONSOLE_LOGLEVEL_QUIET=1
 CONFIG_BOOT_PRINTK_DELAY=y
 CONFIG_DYNAMIC_DEBUG=y
-CONFIG_DEBUG_INFO_DWARF5=y
-CONFIG_DEBUG_INFO_REDUCED=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_MEMORY_INIT=y
-# CONFIG_SCHED_DEBUG is not set
 # CONFIG_FTRACE is not set
 CONFIG_MEMTEST=y

config/sources/families/sm8550.conf

@@ -21,6 +21,12 @@ case $BRANCH in
 		declare -g -i KERNEL_GIT_CACHE_TTL=120 # 2 minutes; this is a high-traffic repo
 		;;
 
+	edge)
+		declare -g KERNEL_MAJOR_MINOR="6.18" # Major and minor versions of this kernel.
+		declare -g KERNELBRANCH='branch:linux-6.18.y'
+		declare -g -i KERNEL_GIT_CACHE_TTL=120 # 2 minutes; this is a high-traffic repo
+		;;
+
 esac
 
 family_tweaks_bsp() {

patch/kernel/archive/sm8550-6.18/0001-arm64-dts-qcom-sm8550-add-UART15.patch

@@ -0,0 +1,53 @@
+From df25170e42b1b5a20e5e2d1489bcffe5d6aee336 Mon Sep 17 00:00:00 2001
+From: Teguh Sobirin <teguh@sobir.in>
+Date: Wed, 12 Feb 2025 17:53:48 +0800
+Subject: [PATCH 01/18] arm64: dts: qcom: sm8550: add UART15
+
+Signed-off-by: Teguh Sobirin <teguh@sobir.in>
+---
+ arch/arm64/boot/dts/qcom/sm8550.dtsi | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
+index 7724dba75..ac0698c01 100644
+--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
++++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
+@@ -1251,6 +1251,20 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
+ 				#size-cells = <0>;
+ 				status = "disabled";
+ 			};
++
++			uart15: serial@89c000 {
++				compatible = "qcom,geni-uart";
++				reg = <0 0x89c000 0 0x4000>;
++				clock-names = "se";
++				clocks = <&gcc GCC_QUPV3_WRAP2_S7_CLK>;
++				pinctrl-names = "default";
++				pinctrl-0 = <&qup_uart15_default>;
++				interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>;
++				interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
++						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_2 0>;
++				interconnect-names = "qup-core", "qup-config";
++				status = "disabled";
++			};
+ 		};
+
+ 		i2c_master_hub_0: geniqup@9c0000 {
+@@ -4917,6 +4931,14 @@ qup_uart14_cts_rts: qup-uart14-cts-rts-state {
+ 				bias-pull-down;
+ 			};
+
++			qup_uart15_default: qup-uart15-default-state {
++				/* TX, RX */
++				pins = "gpio74", "gpio75";
++				function = "qup2_se7";
++				drive-strength = <2>;
++				bias-pull-up;
++			};
++
+ 			sdc2_sleep: sdc2-sleep-state {
+ 				clk-pins {
+ 					pins = "sdc2_clk";
+-- 
+2.43.0
+