1+ // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2+ /*
3+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4+ *
5+ */
6+
7+ #include "dt-bindings/usb/pd.h"
8+
9+
10+ #if 1
11+ /* lt6911 01 hdmi in */
12+ / {
13+ lt6911_1_dc: lt6911-1-dc {
14+ compatible = "rockchip,dummy-codec";
15+ #sound-dai-cells = <0>;
16+ };
17+
18+ lt6911_01-sound {
19+ compatible = "simple-audio-card";
20+ simple-audio-card,format = "i2s";
21+ simple-audio-card,name = "rockchip,lt6911-01";
22+ simple-audio-card,bitclock-master = <&dailink1_master>;
23+ simple-audio-card,frame-master = <&dailink1_master>;
24+ status = "okay";
25+ simple-audio-card,cpu {
26+ sound-dai = <&i2s2_2ch>;
27+ };
28+ dailink1_master: simple-audio-card,codec {
29+ sound-dai = <<6911_1_dc>;
30+ };
31+ };
32+ };
33+
34+
35+ &i2s2_2ch {
36+ status = "okay";
37+ pinctrl-0 = <&i2s2m1_sdi>;
38+ rockchip,clk-trcm = <1>;
39+ };
40+
41+ &mipi1_csi2 {
42+ status = "okay";
43+
44+ ports {
45+ #address-cells = <1>;
46+ #size-cells = <0>;
47+
48+ port@0 {
49+ reg = <0>;
50+ #address-cells = <1>;
51+ #size-cells = <0>;
52+
53+ mipi1_csi2_input: endpoint@1 {
54+ reg = <1>;
55+ remote-endpoint = <&csidphy1_out>;
56+ };
57+ };
58+
59+ port@1 {
60+ reg = <1>;
61+ #address-cells = <1>;
62+ #size-cells = <0>;
63+
64+ mipi1_csi2_output: endpoint@0 {
65+ reg = <0>;
66+ remote-endpoint = <&cif_mipi1_in0>;
67+ };
68+ };
69+ };
70+ };
71+
72+ &csi2_dcphy1 {
73+ status = "okay";
74+
75+ ports {
76+ #address-cells = <1>;
77+ #size-cells = <0>;
78+ port@0 {
79+ reg = <0>;
80+ #address-cells = <1>;
81+ #size-cells = <0>;
82+
83+ mipi_1_in_lt6911: endpoint@1 {
84+ reg = <1>;
85+ remote-endpoint = <<6911_1_out>;
86+ data-lanes = <1 2 3 4>;
87+ };
88+ };
89+ port@1 {
90+ reg = <1>;
91+ #address-cells = <1>;
92+ #size-cells = <0>;
93+
94+ csidphy1_out: endpoint@0 {
95+ reg = <0>;
96+ remote-endpoint = <&mipi1_csi2_input>;
97+ };
98+ };
99+ };
100+ };
101+
102+ &mipi_dcphy1 {
103+ status = "okay";
104+ };
105+
106+ &i2c4 {
107+ pinctrl-names = "default";
108+ pinctrl-0 = <&i2c4m0_xfer>;
109+ status = "okay";
110+
111+ lt6911_1:lt6911_1@2b {
112+ compatible = "lontium,lt6911uxe";
113+ status = "okay";
114+ reg = <0x2b>;
115+ clocks = <&ext_cam_clk>;
116+ clock-names = "xvclk";
117+ power-domains = <&power RK3588_PD_VI>;
118+ pinctrl-names = "default";
119+ pinctrl-0 = <<6911uxc_1_pin>;
120+ interrupt-parent = <&gpio4>;
121+ interrupts = <RK_PB3 IRQ_TYPE_LEVEL_LOW>;
122+ //power-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
123+ reset-gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
124+ plugin-det-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
125+ rockchip,camera-module-index = <0>;
126+ rockchip,camera-module-facing = "back";
127+ rockchip,camera-module-name = "HDMI-MIPI2";
128+ rockchip,camera-module-lens-name = "LT6911UXE";
129+ port {
130+ lt6911_1_out: endpoint {
131+ remote-endpoint = <&mipi_1_in_lt6911>;
132+ data-lanes = <1 2 3 4>;
133+ };
134+ };
135+ };
136+ };
137+
138+
139+ &rkcif_mipi_lvds1 {
140+ status = "okay";
141+
142+ port {
143+ cif_mipi1_in0: endpoint {
144+ remote-endpoint = <&mipi1_csi2_output>;
145+ };
146+ };
147+ };
148+
149+ &rkcif_mipi_lvds1_sditf {
150+ status = "okay";
151+
152+ port {
153+ mipi_lvds1_sditf: endpoint {
154+ remote-endpoint = <&isp0_vir1>;
155+ };
156+ };
157+ };
158+
159+ &rkisp0_vir1 {
160+ status = "okay";
161+
162+ port {
163+ #address-cells = <1>;
164+ #size-cells = <0>;
165+
166+ isp0_vir1: endpoint@0 {
167+ reg = <0>;
168+ remote-endpoint = <&mipi_lvds1_sditf>;
169+ };
170+ };
171+ };
172+
173+ /* lt6911 01 hdmi in end*/
174+ #endif
175+
176+ &rkcif {
177+ status = "okay";
178+ };
179+
180+ &rkcif_mmu {
181+ status = "okay";
182+ };
183+
184+ &rkisp0 {
185+ status = "okay";
186+ };
187+
188+ &isp0_mmu {
189+ status = "okay";
190+ };
191+
192+
193+ &pinctrl {
194+
195+ hdmiin {
196+ lt6911uxc_1_pin: lt6911uxc-1-pin {
197+ rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,// HDMIRX_DET_LT6911
198+ <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, // LT6911UXC_INT
199+ <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; // LT6911_RST
200+ };
201+
202+
203+ };
204+ };
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