Updates the NVM peripheral to use the clock::v2 API
#931
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* `nvm::Nvm::new` now requires the `AhbClk<NvmCtrl>` and `ApbClk<NvmCtrl>`. * Adds the `nvm::Nvm::free` method that returns the PAC controller and bus clocks. * `nvm::Nvm::smart_eeprom` now requires the `AhbClk<NvmCtrlSmeeProm>`. * Adds the `nvm::smart_eeprom::SmartEeprom::free` method that returns the bus clock. * Breaks some Tier 1 BSP examples, which cannot be repaired at the moment due to requiring other peripheral migrations to the `clock::v2` API.
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Summary
As part of the
clock::v2effort tracked in Issue #912, this PR updates thenvmto use theclock::v2API by requiring ownership of itsAhbClks andApbClk. Note that this peripheral is only onthumbv7targets.The NVM has three AHB bus clocks:
CLK_NVMCTRL_AHB,CLK_NVMCTRL_CACHE, andCLK_NVMCTRL_SMEEPROM. It seems thatCLK_NVMCTRL_AHBis needed for basic operation, but the documentation does not talk about exactly whatCLK_NVMCTRL_CACHEandCLK_NVMCTRL_SMEEPROMare needed for at all. As the thenvm::Nvmdoes not seem to do anything with the cache at all, it was assumed thatAhbClk<NvmCtrlCache>is not needed. However, it is assumed thatAhbClk<NvmCtrlSmeeProm>is needed for SmartEEPROM functionality, and so this is now required when callingnvm::Nvm::smart_eeprom, and the clock can be freed withnvm::smart_eeprom::SmartEeprom::free.Note that automatic wait states are enabled when
clock::v2::clock_system_at_resetis called so that the notes here about wait states should not be an issue.The following Tier 1 BSP examples are now broken and cannot be fixed until the noted peripherals are also migrated and merged (see the notes about this in Issue #912):
feather_m4/nvm_dsu(dsu::Dsu,usb::UsbBus)feather_m4/smart_eeprom(usb::UsbBus)Checklist
#[allow]certain lints where reasonable, but ideally justify those with a short comment.